PIC16C924-08/SP Microchip Technology, PIC16C924-08/SP Datasheet - Page 107
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PIC16C924-08/SP
Manufacturer Part Number
PIC16C924-08/SP
Description
IC MCU 64 LD 8MHZ 4K OTP 64-SDIP
Manufacturer
Microchip Technology
Series
PIC® 16Cr
Datasheets
1.PIC16F616T-ISL.pdf
(8 pages)
2.PIC16F818-ISO.pdf
(6 pages)
3.PIC16C923-04L.pdf
(189 pages)
4.PIC16LC924-04L.pdf
(10 pages)
Specifications of PIC16C924-08/SP
Core Processor
PIC
Core Size
8-Bit
Speed
8MHz
Connectivity
I²C, SPI
Peripherals
LCD, POR, PWM, WDT
Number Of I /o
25
Program Memory Size
7KB (4K x 14)
Program Memory Type
OTP
Ram Size
176 x 8
Voltage - Supply (vcc/vdd)
4 V ~ 6 V
Data Converters
A/D 5x8b
Oscillator Type
External
Operating Temperature
0°C ~ 70°C
Package / Case
64-SDIP (0.750", 19.05mm)
For Use With
AC164025 - MODULE SKT PROMATEII 64DIPDVA16XP640 - ADAPTER DEVICE FOR MPLAB-ICE
Lead Free Status / RoHS Status
Request inventory verification / Request inventory verification
Eeprom Size
-
- PIC16F616T-ISL PDF datasheet
- PIC16F818-ISO PDF datasheet #2
- PIC16C923-04L PDF datasheet #3
- PIC16LC924-04L PDF datasheet #4
- Current page: 107 of 189
- Download datasheet (2Mb)
14.4
14.4.1
A Power-on Reset pulse is generated on-chip when
V
take advantage of the POR, just tie the MCLR pin
directly (or through a resistor) to V
nate external RC components usually needed to create
a Power-on Reset. A maximum rise time for V
specified. See Electrical Specifications for details.
When the device starts normal operation (exits the
reset condition), device operating parameters (voltage,
frequency, temperature, ...) must be met to ensure
operation. If these conditions are not met, the device
must be held in reset until the operating conditions are
met.
For additional information, refer to Application Note
AN607, “ Power-up Trouble Shooting .”
14.4.2
The Power-up Timer provides a fixed 72 ms nominal
time-out on power-up only, from the POR. The
Power-up Timer operates on an internal RC oscillator.
The chip is kept in reset as long as the PWRT is active.
The PWRT’s time delay allows V
able level. A configuration bit is provided to enable/dis-
able the PWRT.
The power-up time delay will vary from chip to chip due
to V
parameters for details.
TABLE 14-3: TIME-OUT IN VARIOUS SITUATIONS
DD
1997 Microchip Technology Inc.
DD
Oscillator Configuration
rise is detected (in the range of 1.5V - 2.1V). To
, temperature, and process variation. See DC
Power-on Reset (POR), Power-up
Timer (PWRT) and Oscillator Start-up
Timer (OST)
POWER-ON RESET (POR)
POWER-UP TIMER (PWRT)
XT, HS, LP
RC
DD
to rise to an accept-
DD
. This will elimi-
PWRTE = 1
1024T
—
DD
OSC
is
Power-up
14.4.3
The Oscillator Start-up Timer (OST) provides 1024
oscillator cycle (from OSC1 input) delay after the
PWRT delay is over. This ensures that the crystal oscil-
lator or resonator has started and stabilized.
The OST time-out is invoked only for XT, LP and HS
modes and only on Power-on Reset or wake-up from
SLEEP.
14.4.4
On power-up the time-out sequence is as follows: First
PWRT time-out is invoked after the POR time delay has
expired. Then OST is activated. The total time-out will
vary based on oscillator configuration and the status of
the PWRT. For example, in RC mode with the PWRT
disabled, there will be no time-out at all. Figure 14-8,
Figure 14-9,
is kept low long enough, the time-outs will expire. Then
bringing MCLR high will begin execution immediately
(Figure 14-9). This is useful for testing purposes or to
synchronize more than one PIC16CXXX device operat-
ing in parallel.
Table 14-5 shows the reset conditions for some special
function registers, while Table 14-6 shows the reset
conditions for all the registers.
14.4.5
Bit1 is Power-on Reset Status bit POR. It is cleared on
a Power-on Reset and unaffected otherwise. The user
must set this bit following a Power-on Reset.
sequences on power-up.
Since the time-outs occur from the POR pulse, if MCLR
72 ms + 1024T
PWRTE = 0
72 ms
OSCILLATOR START-UP TIMER (OST)
TIME-OUT SEQUENCE
POWER CONTROL/STATUS REGISTER
(PCON)
and
OSC
Figure 14-10
PIC16C9XX
Wake-up from SLEEP
1024 T
DS30444E - page 107
depict
—
OSC
time-out
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