PIC16C924-08/SP Microchip Technology, PIC16C924-08/SP Datasheet - Page 97
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PIC16C924-08/SP
Manufacturer Part Number
PIC16C924-08/SP
Description
IC MCU 64 LD 8MHZ 4K OTP 64-SDIP
Manufacturer
Microchip Technology
Series
PIC® 16Cr
Datasheets
1.PIC16F616T-ISL.pdf
(8 pages)
2.PIC16F818-ISO.pdf
(6 pages)
3.PIC16C923-04L.pdf
(189 pages)
4.PIC16LC924-04L.pdf
(10 pages)
Specifications of PIC16C924-08/SP
Core Processor
PIC
Core Size
8-Bit
Speed
8MHz
Connectivity
I²C, SPI
Peripherals
LCD, POR, PWM, WDT
Number Of I /o
25
Program Memory Size
7KB (4K x 14)
Program Memory Type
OTP
Ram Size
176 x 8
Voltage - Supply (vcc/vdd)
4 V ~ 6 V
Data Converters
A/D 5x8b
Oscillator Type
External
Operating Temperature
0°C ~ 70°C
Package / Case
64-SDIP (0.750", 19.05mm)
For Use With
AC164025 - MODULE SKT PROMATEII 64DIPDVA16XP640 - ADAPTER DEVICE FOR MPLAB-ICE
Lead Free Status / RoHS Status
Request inventory verification / Request inventory verification
Eeprom Size
-
- PIC16F616T-ISL PDF datasheet
- PIC16F818-ISO PDF datasheet #2
- PIC16C923-04L PDF datasheet #3
- PIC16LC924-04L PDF datasheet #4
- Current page: 97 of 189
- Download datasheet (2Mb)
13.2
The LCD timing generation provides an interrupt that
defines the LCD frame timing. This interrupt can be
used to coordinate the writing of the pixel data with the
start of a new frame. Writing pixel data at the frame
boundary allows a visually crisp transition of the image.
This interrupt can also be used to synchronize external
events to the LCD. For example, the interface to an
external segment driver, such as a Microchip AY0438,
can be synchronized for segment data update to the
LCD frame.
FIGURE 13-9: EXAMPLE WAVEFORMS IN 1/4 MUX DRIVE
1997 Microchip Technology Inc.
COM0
COM1
COM2
COM3
T
T
LCD Interrupts
FWR
FINT
= (T
= T
Frame
Boundary
(T
FRAME
FWR
FWR
/2 - (2T
/2 - (1T
/(LMUX1:LMUX0 + 1)
CY
CY
+ 40 ns))
+ 40 ns))
min.
max.
1 Frame
A new frame is defined to begin at the leading edge of
the COM0 common signal. The interrupt will be set
immediately after the LCD controller completes
accessing all pixel data required for a frame. This will
occur at a certain fixed time before the frame boundary
as shown in Figure 13-9. The LCD controller will begin
to access data for the next frame within T
interrupt.
LCD
Interrupt
occurs
T
FWR
T
FINT
Controller accesses
next frame data
Frame
Boundary
PIC16C9XX
DS30444E - page 97
FWR
V3
V2
V1
V0
V3
V2
V1
V0
V3
V2
V1
V0
V3
V2
V1
V0
after the
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