PIC17C42A-33I/PQ Microchip Technology, PIC17C42A-33I/PQ Datasheet - Page 117
![IC MCU OTP 2KX16 PWM 44-MQFP](/photos/6/59/65984/150-44-pqfp_sml.jpg)
PIC17C42A-33I/PQ
Manufacturer Part Number
PIC17C42A-33I/PQ
Description
IC MCU OTP 2KX16 PWM 44-MQFP
Manufacturer
Microchip Technology
Series
PIC® 17Cr
Datasheets
1.PIC16F616T-ISL.pdf
(8 pages)
2.PIC17C42A-16P.pdf
(241 pages)
3.PIC17C42A-16P.pdf
(4 pages)
Specifications of PIC17C42A-33I/PQ
Core Processor
PIC
Core Size
8-Bit
Speed
33MHz
Connectivity
UART/USART
Peripherals
POR, PWM, WDT
Number Of I /o
33
Program Memory Size
4KB (2K x 16)
Program Memory Type
OTP
Ram Size
232 x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 6 V
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
44-MQFP, 44-PQFP
Processor Series
PIC17C
Core
PIC
Data Bus Width
8 bit
Data Ram Size
232 B
Interface Type
SCI, USART
Maximum Clock Frequency
33 MHz
Number Of Programmable I/os
33
Number Of Timers
8
Operating Supply Voltage
2.5 V to 6 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Development Tools By Supplier
ICE2000
Minimum Operating Temperature
- 40 C
For Use With
AC164316 - MODULE SKT MPLAB PM3 44MQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Data Converters
-
Lead Free Status / Rohs Status
Details
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
PIC17C42A-33I/PQ
Manufacturer:
Microchip Technology
Quantity:
10 000
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CALL
Syntax:
Operands:
Operation:
Status Affected:
Encoding:
Description:
Words:
Cycles:
Q Cycle Activity:
Example:
1996 Microchip Technology Inc.
Before Instruction
After Instruction
Forced NOP
Decode
PC =
PC =
TOS =
Q1
Read literal
Address(HERE)
Address(THERE)
Address (HERE + 1)
Subroutine Call
[ label ] CALL k
0
PC+ 1
k<12:8>
PC<15:13>
Subroutine call within 8K page. First,
return address (PC+1) is pushed onto
the stack. The 13-bit value is loaded into
PC bits<12:0>. Then the upper-eight
bits of the PC are copied into PCLATH.
Call is a two-cycle instruction.
See LCALL for calls outside 8K memory
space.
1
2
HERE
None
'k'<7:0>
NOP
111k
Q2
k
4095
TOS, k
kkkk
CALL
PCLATH<4:0>;
Execute
Execute
PCLATH<7:5>
Q3
THERE
PC<12:0>,
kkkk
NOP
NOP
Q4
kkkk
CLRF
Syntax:
Operands:
Operation:
Status Affected:
Encoding:
Description:
Words:
Cycles:
Q Cycle Activity:
Example:
Before Instruction
After Instruction
Decode
FLAG_REG
FLAG_REG
Q1
register 'f'
Clear f
[ label ] CLRF
0
00h
00h
None
Clears the contents of the specified reg-
ister(s).
s = 0: Data memory location 'f' and
WREG are cleared.
s = 1: Data memory location 'f' is
cleared.
1
1
CLRF
Read
0010
Q2
=
=
f
255
f, s
dest
0x5A
0x00
PIC17C4X
100s
Execute
[0,1]
FLAG_REG
f,s
Q3
DS30412C-page 117
ffff
register 'f'
and other
specified
register
Write
Q4
ffff
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