PIC17C42A-33I/PQ Microchip Technology, PIC17C42A-33I/PQ Datasheet - Page 38
![IC MCU OTP 2KX16 PWM 44-MQFP](/photos/6/59/65984/150-44-pqfp_sml.jpg)
PIC17C42A-33I/PQ
Manufacturer Part Number
PIC17C42A-33I/PQ
Description
IC MCU OTP 2KX16 PWM 44-MQFP
Manufacturer
Microchip Technology
Series
PIC® 17Cr
Datasheets
1.PIC16F616T-ISL.pdf
(8 pages)
2.PIC17C42A-16P.pdf
(241 pages)
3.PIC17C42A-16P.pdf
(4 pages)
Specifications of PIC17C42A-33I/PQ
Core Processor
PIC
Core Size
8-Bit
Speed
33MHz
Connectivity
UART/USART
Peripherals
POR, PWM, WDT
Number Of I /o
33
Program Memory Size
4KB (2K x 16)
Program Memory Type
OTP
Ram Size
232 x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 6 V
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
44-MQFP, 44-PQFP
Processor Series
PIC17C
Core
PIC
Data Bus Width
8 bit
Data Ram Size
232 B
Interface Type
SCI, USART
Maximum Clock Frequency
33 MHz
Number Of Programmable I/os
33
Number Of Timers
8
Operating Supply Voltage
2.5 V to 6 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Development Tools By Supplier
ICE2000
Minimum Operating Temperature
- 40 C
For Use With
AC164316 - MODULE SKT MPLAB PM3 44MQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Data Converters
-
Lead Free Status / Rohs Status
Details
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
PIC17C42A-33I/PQ
Manufacturer:
Microchip Technology
Quantity:
10 000
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PIC17C4X
6.2.2.3
This register contains various control bits. Bit7
(INTEDG) is used to control the edge upon which a sig-
nal on the RA0/INT pin will set the RB0/INT interrupt
flag. The other bits configure the Timer0 prescaler and
clock source. (Figure 11-1).
FIGURE 6-9:
DS30412C-page 38
bit7
bit 7:
bit 6:
bit 5:
bit 4-1: PS3:PS0: Timer0 Prescale Selection bits
bit 0:
INTEDG
R/W - 0
TMR0 STATUS/CONTROL REGISTER
(T0STA)
INTEDG: RA0/INT Pin Interrupt Edge Select bit
This bit selects the edge upon which the interrupt is detected.
1 = Rising edge of RA0/INT pin generates interrupt
0 = Falling edge of RA0/INT pin generates interrupt
T0SE: Timer0 Clock Input Edge Select bit
This bit selects the edge upon which TMR0 will increment.
When T0CS = 0
1 = Rising edge of RA1/T0CKI pin increments TMR0 and/or generates a T0CKIF interrupt
0 = Falling edge of RA1/T0CKI pin increments TMR0 and/or generates a T0CKIF interrupt
When T0CS = 1
Don’t care
T0CS: Timer0 Clock Source Select bit
This bit selects the clock source for Timer0.
1 = Internal instruction clock cycle (T
0 = T0CKI pin
These bits select the prescale value for Timer0.
Unimplemented: Read as '0'
PS3:PS0
R/W - 0
T0SE
0000
0001
0010
0011
0100
0101
0110
0111
1xxx
T0STA REGISTER (ADDRESS: 05h, UNBANKED)
R/W - 0
T0CS
Prescale Value
1:128
1:256
1:16
1:32
1:64
R/W - 0
1:1
1:2
1:4
1:8
PS3
R/W - 0
PS2
CY
)
R/W - 0
PS1
R/W - 0
PS0
U - 0
—
bit0
R = Readable bit
W = Writable bit
U = Unimplemented,
-n = Value at POR reset
1996 Microchip Technology Inc.
reads as ‘0’
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