AT90LS4433-4PI Atmel, AT90LS4433-4PI Datasheet - Page 20

• Manufacturer Part Number: AT90LS4433-4PI
• Description: IC MCU 4K FLSH 4MHZ A/D LV 28DIP
• Manufacturer: Atmel
• Series: AVR® 90LSr

Specifications of AT90LS4433-4PI

• Core Processor: AVR
• Core Size: 8-Bit
• Speed: 4MHz
• Connectivity: SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 20
• Program Memory Size: 4KB (2K x 16)
• Program Memory Type: FLASH
• Eeprom Size: 256 x 8
• Ram Size: 128 x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 6 V
• Data Converters: A/D 6x10b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 28-DIP (0.300", 7.62mm)
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

Stack Pointer – SP
Reset and Interrupt
Handling
20
AT90S/LS4433
The AT90S4433 Stack Pointer is implemented as an 8-bit register in the I/O space loca-
tion $3D ($5D). As the AT90S4433 data memory has $0DF locations, eight bits are
used.
The Stack Pointer points to the data SRAM stack area where the Subroutine and Inter-
rupt stacks are located. This stack space in the data SRAM must be defined by the
program before any subroutine calls are executed or interrupts are enabled. The Stack
Pointer must be set to point above $60. The Stack Pointer is decremented by one when
data is pushed onto the stack with the PUSH instruction, and it is decremented by two
when an address is pushed onto the Stack with subroutine calls and interrupts. The
Stack Pointer is incremented by one when data is popped from the stack with the POP
instruction, and it is incremented by two when an address is popped from the Stack with
return from subroutine RET or return from interrupt RETI.
The AT90S4433 provides 13 different interrupt sources. These interrupts and the sepa-
rate reset vector each have a separate Program Vector in the Program memory space.
All interrupts are assigned individual enable bits, which must be set (one) together with
the I-bit in the Status Register in order to enable the interrupt.
The lowest addresses in the Program memory space are automatically defined as the
Reset and Interrupt Vectors. The complete list of Vectors is shown in Table 3. The list
also determines the priority levels of the different interrupts. The lower the address, the
higher the priority level. RESET has the highest priority, and next is INT0 (the External
Interrupt Request 0), etc.
Table 3. Reset and Interrupt Vectors
$3D ($5D)
Read/Write
Initial Value
Vector No.
10
11
12
13
14
1
2
3
4
5
6
7
8
9
Program
Address
SP7
R/W
7
0
$00A
$00B
$00C
$00D
$000
$001
$002
$003
$004
$005
$006
$007
$008
$009
SP6
R/W
6
0
Source
RESET
INT0
INT1
TIMER1 CAPT
TIMER1 COMP
TIMER1 OVF
TIMER0 OVF
SPI, STC
UART, RX
UART, UDRE
ADC
EE_RDY
ANA_COMP
UART, TX
SP5
R/W
5
0
SP4
R/W
4
0
Interrupt Definition
External Pin, Power-on Reset, Brown-out Reset
and Watchdog Reset
External Interrupt Request 0
External Interrupt Request 1
Timer/Counter1 Capture Event
Timer/Counter1 Compare Match
Timer/Counter1 Overflow
Timer/Counter0 Overflow
Serial Transfer Complete
UART, Rx Complete
UART, Tx Complete
ADC Conversion Complete
EEPROM Ready
Analog Comparator
UART Data Register Empty
SP3
R/W
3
0
SP2
R/W
2
0
SP1
R/W
1
0
SP0
R/W
1042H–AVR–04/03
0
0
SP