ATTINY11L-2PI Atmel, ATTINY11L-2PI Datasheet - Page 55

• Manufacturer Part Number: ATTINY11L-2PI
• Description: IC AVR MCU 1K 2MHZ LV IND 8-DIP
• Manufacturer: Atmel
• Series: AVR® ATtinyr

Specifications of ATTINY11L-2PI

• Core Processor: AVR
• Core Size: 8-Bit
• Speed: 2MHz
• Peripherals: WDT
• Number Of I /o: 6
• Program Memory Size: 1KB (512 x 16)
• Program Memory Type: FLASH
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 8-DIP (0.300", 7.62mm)
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Ram Size: -
• Data Converters: -
• Connectivity: -
• Other names: ATTINY11L2PI

Low-voltage Serial
Programming Algorithm
1006F–AVR–06/07
If the chip Erase command in Low-voltage Serial Programming is executed only once,
one data byte may be written to the flash after erase. Using the following algorithm guar-
antees that the flash will be erased:
•
•
•
For the EEPROM, an auto-erase cycle is provided within the self-timed write instruction
and there is no need to first execute the Chip Erase instruction. The Chip Erase instruc-
tion turns the content of every memory location in both the program and EEPROM
arrays into $FF.
The program and EEPROM memory arrays have separate address spaces:
$0000 to $01FF for program memory and $000 to $03F for EEPROM memory.
The device can be clocked by any clock option during Low-voltage Serial Programming.
The minimum low and high periods for the serial clock (SCK) input are defined as
follows:
Low: > 2 MCU clock cycles
High: > 2 MCU clock cycles
When writing serial data to the ATtiny12, data is clocked on the rising edge of SCK.
When reading data from the ATtiny12, data is clocked on the falling edge of SCK. See
Figure 30, Figure 31 and Table 26 for timing details. To program and verify the ATtiny12
in the serial programming mode, the following sequence is recommended (See 4 byte
instruction formats in Table 25):
1. Power-up sequence:
2. Wait for at least 20 ms and enable serial programming by sending the Program-
3. The serial programming instructions will not work if the communication is out of
4. If a Chip Erase is performed (must be done to erase the Flash), wait t
5. The Flash or EEPROM array is programmed one byte at a time by supplying the
Execute a chip erase command
Write $FF to address $00 in the flash
Execute a second chip erase command
Apply power between VCC and GND while RESET and SCK are set to “0”. In accor-
dance with the setting of CKSEL fuses, apply a crystal/resonator, external clock or
RC network, or let the device run on the internal RC oscillator. In some systems, the
programmer can not guarantee that SCK is held low during power-up. In this case,
RESET must be given a positive pulse of at least two MCU cycles duration after
SCK has been set to “0”.
ming Enable Serial instruction to the MOSI (PB0) pin.
synchronization. When in sync, the second byte ($53) will echo back when issu-
ing the third byte of the Programming Enable instruction. Whether the echo is
correct or not, all 4 bytes of the instruction must be transmitted. If the $53 did not
echo back, give SCK a positive pulse and issue a new Programming Enable
instruction. If the $53 is not seen within 32 attempts, there is no functional device
connected.
after the instruction, give RESET a positive pulse, and start over from Step 2.
See Table 27 on page 58 for t
address and data together with the appropriate Write instruction. An EEPROM
memory location is first automatically erased before new data is written. Use
Data Polling to detect when the next byte in the Flash or EEPROM can be writ-
ten. If polling is not used, wait t
WD_ERASE
WD_FLASH
value.
or t
WD_EEPROM
before transmitting the
ATtiny11/12
WD_ERASE
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