ATMEGA323-8AC Atmel, ATMEGA323-8AC Datasheet - Page 216
![IC AVR MCU 32K 8MHZ COM 44TQFP](/photos/6/70/67042/313-44-tqfp_sml.jpg)
ATMEGA323-8AC
Manufacturer Part Number
ATMEGA323-8AC
Description
IC AVR MCU 32K 8MHZ COM 44TQFP
Manufacturer
Atmel
Series
AVR® ATmegar
Datasheet
1.ATMEGA323L-4PC.pdf
(247 pages)
Specifications of ATMEGA323-8AC
Core Processor
AVR
Core Size
8-Bit
Speed
8MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
32
Program Memory Size
32KB (16K x 16)
Program Memory Type
FLASH
Eeprom Size
1K x 8
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
0°C ~ 70°C
Package / Case
44-TQFP, 44-VQFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Other names
ATMEGA3238AC
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Two-wire Serial Interface Characteristics
Table 74 describes the requirements for devices connected to the Two-wire Serial Bus. The ATmega323 Two-wire Serial
Interface meets or exceeds these requirements under the noted conditions.
Timing symbols refer to Figure 107.
Table 74. Two-wire Serial Bus Requirements
Notes:
216
Symbol
VIL
VIH
Vhys
VOL
tof
tSP
I
C
f
t
t
t
t
t
t
t
t
i
SCL
HD;STA
LOW
HIGH
SU;STA
HD;DAT
SU;DAT
SU;STO
BUF
i
(1)
(1)
(1)
(1)
(1)
2. Required only for f
3. C
4. f
5. This requirement applies to all ATmega323 Two-wire Serial Interface operation. Other devices connected to the Two-wire
6. The actual low period generated by the ATmega323 Two-wire Serial Interface is (1/f
7. The actual low period generated by the ATmega323 Two-wire Serial Interface is (1/f
1. In ATmega323, this parameter is characterized and not 100% tested.
ATmega323(L)
Parameter
Input Low-voltage
Input High-voltage
Hysteresis of Schmitt Trigger Inputs
Output Low-voltage
Output Fall Time from V
Spikes Suppressed by Input Filter
Input Current each I/O Pin
Capacitance for each I/O Pin
SCL Clock Frequency
Hold Time (repeated) START Condition
Low Period of the SCL Clock
High period of the SCL clock
Set-up time for a repeated START condition
Data hold time
Data setup time
Setup time for STOP condition
Bus free time between a STOP and START
condition
Serial Bus need only obey the general f
6 MHz for the low time requirement to be strictly met at f
ment will not be strictly met for f
CK
b
= capacitance of one bus line in pF.
= CPU clock frequency
SCL
> 100 kHz.
IHmin
to V
ILmax
SCL
> 308 kHz when f
SCL
requirement.
f
CK
(4)
SCL
CK
10 pF < C
0.1V
> max(16f
3 mA sink current
= 8 MHz. Still, ATmega323 devices connected to the bus may
f
f
= 100 kHz.
SCL
SCL
f
f
f
f
f
f
f
f
f
f
f
f
f
f
SCL
SCL
SCL
SCL
SCL
SCL
SCL
SCL
SCL
SCL
SCL
SCL
SCL
SCL
CC
Condition
> 100 kHz
> 100 kHz
> 100 kHz
> 100 kHz
> 100 kHz
> 100 kHz
> 100 kHz
> 100 kHz
< V
100 kHz
b
100 kHz
100 kHz
100 kHz
100 kHz
100 kHz
100 kHz
100 kHz
< 400 pF
SCL
i
< 0.9V
, 250kHz)
(6)
(7)
CC
(3)
(5)
SCL
SCL
20 + 0.1C
- 2/f
0.05 V
- 2/f
0.7 V
CK
-0.5
250
100
Min
-10
4.0
0.6
4.7
1.3
4.0
0.6
4.7
0.6
4.0
0.6
4.7
1.3
), thus f
0
0
–
0
0
0
CK
CC
CC
), thus the low time require-
b
(2)
(3)(2)
CK
must be greater than
V
0.3 V
CC
50
3.45
Max
250
400
0.4
0.9
10
10
1457G–AVR–09/03
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
+ 0.5
(2)
CC
Units
kHz
µA
pF
ns
ns
µs
µs
µs
µs
µs
µs
µs
µs
µs
µs
ns
ns
µs
µs
µs
µs
V
V
V
V
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