ATMEGA323L-4AI Atmel, ATMEGA323L-4AI Datasheet - Page 71

• Manufacturer Part Number: ATMEGA323L-4AI
• Description: IC AVR MCU 32K LV 4MZ IND 44TQFP
• Manufacturer: Atmel
• Series: AVR® ATmegar

Specifications of ATMEGA323L-4AI

• Core Processor: AVR
• Core Size: 8-Bit
• Speed: 4MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 32
• Program Memory Size: 32KB (16K x 16)
• Program Memory Type: FLASH
• Eeprom Size: 1K x 8
• Ram Size: 2K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 44-TQFP, 44-VQFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Other names: ATMEGA323L4AI

Data Modes
SPI Control Register – SPCR
1457G–AVR–09/03
once the SS pin is driven high. If the SS pin is driven high during a transmission, the SPI
will stop sending and receiving immediately and both data received and data sent must
be considered as lost.
There are four combinations of SCK phase and polarity with respect to serial data,
which are determined by control bits CPHA and CPOL. The SPI data transfer formats
are shown in Figure 43 and Figure 44.
Figure 43. SPI Transfer Format with CPHA = 0 and DORD = 0
Note:
Figure 44. SPI Transfer Format with CPHA = 1 and DORD = 0
Note:
• Bit 7 – SPIE: SPI Interrupt Enable
This bit causes the SPI interrupt to be executed if SPIF bit in the SPSR Register is set
and the if the Global Interrupt Enable bit in SREG is set.
• Bit 6 – SPE: SPI Enable
When the SPE bit is set (one), the SPI is enabled. This bit must be set to enable any SPI
operations.
Bit
$0D ($2D)
Read/Write
Initial Value
1. * Not defined but normally MSB of character just received.
1. * Not defined but normally LSB of previously transmitted character.
SPIE
R/W
7
0
SPE
R/W
6
0
DORD
R/W
5
0
MSTR
R/W
4
0
CPOL
R/W
3
0
CPHA
R/W
2
0
ATmega323(L)
(1)
(1)
SPR1
R/W
1
0
SPR0
R/W
0
0
SPCR
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