PIC18C452-E/PT Microchip Technology, PIC18C452-E/PT Datasheet - Page 63
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PIC18C452-E/PT
Manufacturer Part Number
PIC18C452-E/PT
Description
IC MCU OTP 16KX16 A/D 44TQFP
Manufacturer
Microchip Technology
Series
PIC® 18Cr
Datasheets
1.PIC16F616T-ISL.pdf
(8 pages)
2.PIC16C770-ISO.pdf
(8 pages)
3.PIC18C242-ISO.pdf
(305 pages)
4.PIC18C242-ISO.pdf
(12 pages)
Specifications of PIC18C452-E/PT
Core Processor
PIC
Core Size
8-Bit
Speed
40MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, LVD, POR, PWM, WDT
Number Of I /o
33
Program Memory Size
32KB (16K x 16)
Program Memory Type
OTP
Ram Size
1.5K x 8
Voltage - Supply (vcc/vdd)
4.2 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
External
Operating Temperature
-40°C ~ 125°C
Package / Case
44-TQFP, 44-VQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Other names
PIC18C452E/PT
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
PIC18C452-E/PT
Manufacturer:
Microchip Technology
Quantity:
10 000
- PIC16F616T-ISL PDF datasheet
- PIC16C770-ISO PDF datasheet #2
- PIC18C242-ISO PDF datasheet #3
- PIC18C242-ISO PDF datasheet #4
- Current page: 63 of 305
- Download datasheet (6Mb)
6.0
6.1
An 8 x 8 hardware multiplier is included in the ALU of
the PIC18CXX2 devices. By making the multiply a
hardware operation, it completes in a single instruction
cycle. This is an unsigned multiply that gives a 16-bit
result. The result is stored into the 16-bit product regis-
ter pair (PRODH:PRODL). The multiplier does not
affect any flags in the ALUSTA register.
TABLE 6-1:
6.2
Example 6-1 shows the sequence to do an 8 x 8
unsigned multiply. Only one instruction is required
when one argument of the multiply is already loaded in
the WREG register.
Example 6-2 shows the sequence to do an 8 x 8 signed
multiply. To account for the sign bits of the arguments,
each argument’s Most Significant bit (MSb) is tested
and the appropriate subtractions are done.
EXAMPLE 6-1:
MOVF
MULWF
16 x 16 unsigned
2001 Microchip Technology Inc.
8 x 8 unsigned
16 x 16 signed
8 x 8 signed
Routine
8 X 8 HARDWARE MULTIPLIER
Introduction
Operation
ARG1, W
ARG2
PERFORMANCE COMPARISON
8 x 8 UNSIGNED
MULTIPLY ROUTINE
Without hardware multiply
Without hardware multiply
Without hardware multiply
Without hardware multiply
;
; ARG1 * ARG2 ->
;
Hardware multiply
Hardware multiply
Hardware multiply
Hardware multiply
Multiply Method
PRODH:PRODL
Program
Memory
(Words)
13
33
21
24
52
36
1
6
Making the 8 x 8 multiplier execute in a single cycle
gives the following advantages:
• Higher computational throughput
• Reduces code size requirements for multiply
The performance increase allows the device to be used
in applications previously reserved for Digital Signal
Processors.
Table 6-1 shows a performance comparison between
enhanced devices using the single cycle hardware mul-
tiply, and performing the same function without the
hardware multiply.
EXAMPLE 6-2:
Example 6-3 shows the sequence to do a 16 x 16
unsigned multiply. Equation 6-1 shows the algorithm
that is used. The 32-bit result is stored in four registers,
RES3:RES0.
EQUATION 6-1:
RES3:RES0
MOVF
MULWF
BTFSC
SUBWF
MOVF
BTFSC
SUBWF
algorithms
Cycles
(Max)
242
254
69
91
24
36
1
6
ARG1,
ARG2
ARG2,
PRODH, F
ARG2,
ARG1,
PRODH, F
=
=
@ 40 MHz
ARG1H:ARG1L
(ARG1H
(ARG1H
(ARG1L
(ARG1L
24.2 s
25.4 s
100 ns
600 ns
6.9 s
9.1 s
2.4 s
3.6 s
SB
SB
W
W
8 x 8 SIGNED MULTIPLY
ROUTINE
16 x 16 UNSIGNED
MULTIPLICATION
ALGORITHM
PIC18CXX2
; ARG1 * ARG2 ->
; PRODH:PRODL
; Test Sign Bit
; PRODH = PRODH
;
; Test Sign Bit
; PRODH = PRODH
;
ARG2H
ARG2L
ARG2H
ARG2L)
@ 10 MHz
102.6 s
27.6 s
36.4 s
96.8 s
14.4 s
Time
400 ns
2.4 s
9.6 s
ARG2H:ARG2L
DS39026C-page 61
2
2
2
- ARG1
- ARG2
16
8
8
)+
)+
)+
@ 4 MHz
242 s
254 s
69 s
91 s
24 s
36 s
1 s
6 s
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