PIC17C766-33E/L Microchip Technology, PIC17C766-33E/L Datasheet - Page 36
![no-image](/images/manufacturer_photos/0/4/439/microchip_technology_sml.jpg)
PIC17C766-33E/L
Manufacturer Part Number
PIC17C766-33E/L
Description
IC MCU CMOS 33MHZ 16K EPRM84PLCC
Manufacturer
Microchip Technology
Series
PIC® 17Cr
Datasheets
1.PIC16F616T-ISL.pdf
(8 pages)
2.PIC17C752-16L.pdf
(304 pages)
3.PIC17C752-16L.pdf
(6 pages)
Specifications of PIC17C766-33E/L
Core Processor
PIC
Core Size
8-Bit
Speed
33MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
66
Program Memory Size
32KB (16K x 16)
Program Memory Type
OTP
Ram Size
902 x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 16x10b
Oscillator Type
External
Operating Temperature
-40°C ~ 125°C
Package / Case
84-PLCC
For Use With
AC164318 - MODULE SKT MPLAB PM3 84PLCCDVA17XL841 - DEVICE ADAPTER FOR PIC17C762DM173001 - KIT DEVELOPMENT PICDEM17AC164027 - ADAPTER PICSTART PLUS 84PLCCAC174012 - MODULE SKT PROMATEII 84PLCC
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
PIC17C766-33E/L
Manufacturer:
Microchip Technology
Quantity:
10 000
- Current page: 36 of 304
- Download datasheet (6Mb)
PIC17C7XX
REGISTER 6-3: PIE2 REGISTER (ADDRESS: 11h, BANK 4)
DS30289B-page 36
bit 7
bit 6
bit 5
bit 4
bit 3
bit 2
bit 1
bit 0
Legend:
R = Readable bit
- n = Value at POR Reset
bit 7
SSPIE: Synchronous Serial Port Interrupt Enable bit
1 = Enable SSP interrupt
0 = Disable SSP interrupt
BCLIE: Bus Collision Interrupt Enable bit
1 = Enable bus collision interrupt
0 = Disable bus collision interrupt
ADIE: A/D Module Interrupt Enable bit
1 = Enable A/D module interrupt
0 = Disable A/D module interrupt
Unimplemented: Read as ‘0’
CA4IE: Capture4 Interrupt Enable bit
1 = Enable Capture4 interrupt
0 = Disable Capture4 interrupt
CA3IE: Capture3 Interrupt Enable bit
1 = Enable Capture3 interrupt
0 = Disable Capture3 interrupt
TX2IE: USART2 Transmit Interrupt Enable bit
1 = Enable USART2 Transmit buffer empty interrupt
0 = Disable USART2 Transmit buffer empty interrupt
RC2IE: USART2 Receive Interrupt Enable bit
1 = Enable USART2 Receive buffer full interrupt
0 = Disable USART2 Receive buffer full interrupt
SSPIE
R/W-0
R/W-0
BCLIE
R/W-0
ADIE
W = Writable bit
’1’ = Bit is set
U-0
—
CA4IE
R/W-0
U = Unimplemented bit, read as ‘0’
’0’ = Bit is cleared
CA3IE
R/W-0
2000 Microchip Technology Inc.
x = Bit is unknown
R/W-0
TX2IE
RC2IE
R/W-0
bit 0
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