PIC17C766-33E/L Microchip Technology, PIC17C766-33E/L Datasheet - Page 82
![no-image](/images/manufacturer_photos/0/4/439/microchip_technology_sml.jpg)
PIC17C766-33E/L
Manufacturer Part Number
PIC17C766-33E/L
Description
IC MCU CMOS 33MHZ 16K EPRM84PLCC
Manufacturer
Microchip Technology
Series
PIC® 17Cr
Datasheets
1.PIC16F616T-ISL.pdf
(8 pages)
2.PIC17C752-16L.pdf
(304 pages)
3.PIC17C752-16L.pdf
(6 pages)
Specifications of PIC17C766-33E/L
Core Processor
PIC
Core Size
8-Bit
Speed
33MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
66
Program Memory Size
32KB (16K x 16)
Program Memory Type
OTP
Ram Size
902 x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 16x10b
Oscillator Type
External
Operating Temperature
-40°C ~ 125°C
Package / Case
84-PLCC
For Use With
AC164318 - MODULE SKT MPLAB PM3 84PLCCDVA17XL841 - DEVICE ADAPTER FOR PIC17C762DM173001 - KIT DEVELOPMENT PICDEM17AC164027 - ADAPTER PICSTART PLUS 84PLCCAC174012 - MODULE SKT PROMATEII 84PLCC
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
PIC17C766-33E/L
Manufacturer:
Microchip Technology
Quantity:
10 000
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PIC17C7XX
10.5
PORTE is a 4-bit bi-directional port. The corresponding
data direction register is DDRE. A ’1’ in DDRE config-
ures the corresponding port pin as an input. A ’0’ in the
DDRE register configures the corresponding port pin
as an output. Reading PORTE reads the status of the
pins, whereas writing to PORTE will write to the port
latch. PORTE is multiplexed with the system bus.
When operating as the system bus, PORTE contains
the
(AD15:AD0). These control signals are Address Latch
Enable (ALE), Output Enable (OE) and Write (WR).
The control signals OE and WR are active low signals.
The timing for the system bus is shown in the Electrical
Specifications section.
FIGURE 10-11:
DS30289B-page 82
Note: I/O pins have protection diodes to V
Note:
control
PORTE and DDRE Register
Three pins of this port are configured as
the system bus when the device’s configu-
ration bits are selected to Microprocessor
or Extended Microcontroller modes. The
other pin is a general purpose I/O or
Capture4 pin. In the two other micro-
controller modes, RE2:RE0 are general
purpose I/O pins.
signals
BLOCK DIAGRAM OF RE2:RE0 (IN I/O PORT MODE)
for
TTL
Input
Buffer
the
0
1
address/data
Data
Port
DD
and V
R
Q
Q
SS
.
CK
CK
S
bus
D
D
Example 10-5 shows an instruction sequence to initial-
ize PORTE. The Bank Select Register (BSR) must be
selected to Bank 1 for the port to be initialized. The fol-
lowing example uses the MOVLB instruction to load the
BSR register for bank selection.
EXAMPLE 10-5:
MOVLB
CLRF
MOVLW
MOVWF
1
PORTE, F
0x03
DDRE
; Select Bank 1
; Initialize PORTE data
; latches before setting
; the data direction
; register
; Value used to initialize
; data direction
; Set RE<1:0> as inputs
; RE<3:2> as outputs
; RE<7:4> are always
; read as ’0’
INITIALIZING PORTE
WR_PORTE
RD_PORTE
2000 Microchip Technology Inc.
WR_DDRE
RD_DDRE
DRV_SYS
Data Bus
EX_EN
CNTL
System Bus
Control
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