PIC16F77-I/LG Microchip Technology, PIC16F77-I/LG Datasheet - Page 413
![IC MCU FLASH 8KX14 W/AD 44PLCC](/photos/6/63/66325/150-44-plcc_sml.jpg)
PIC16F77-I/LG
Manufacturer Part Number
PIC16F77-I/LG
Description
IC MCU FLASH 8KX14 W/AD 44PLCC
Manufacturer
Microchip Technology
Series
PIC® 16Fr
Datasheets
1.PIC16F616T-ISL.pdf
(8 pages)
2.PIC16F688T-ISL.pdf
(688 pages)
3.PIC16F818-ISO.pdf
(6 pages)
4.PIC16F73-ISP.pdf
(174 pages)
5.PIC16F73-ISP.pdf
(14 pages)
6.PIC16F73-ISP.pdf
(12 pages)
Specifications of PIC16F77-I/LG
Core Processor
PIC
Core Size
8-Bit
Speed
20MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
33
Program Memory Size
14KB (8K x 14)
Program Memory Type
FLASH
Ram Size
368 x 8
Voltage - Supply (vcc/vdd)
4 V ~ 5.5 V
Data Converters
A/D 8x8b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
44-PLCC
For Use With
DVA16XL441 - ADAPTER DEVICE ICE 44PLCC
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
- PIC16F616T-ISL PDF datasheet
- PIC16F688T-ISL PDF datasheet #2
- PIC16F818-ISO PDF datasheet #3
- PIC16F73-ISP PDF datasheet #4
- PIC16F73-ISP PDF datasheet #5
- PIC16F73-ISP PDF datasheet #6
- Current page: 413 of 688
- Download datasheet (3Mb)
22.6
1997 Microchip Technology Inc.
A/D Conversions
Section 22. Basic 8-bit A/D Converter
Example 22-2
inputs. The analog reference (V
conversion clock is F
Clearing the GO/DONE bit during a conversion will abort the current conversion. The ADRES
register will NOT be updated with the partially completed A/D conversion sample. That is, the
ADRES register will continue to contain the value of the last completed conversion (or the last
value written to the ADRES register). After the A/D conversion is aborted, a 2T
before the next acquisition is started. After this 2T
on the selected channel.
Example 22-2:
Figure 22-4:
;
;
;
;
Note:
Ensure that the required sampling time for the selected input
channel has elapsed. Then the conversion may be started.
Set GO bit
BSF
CLRF
BCF
MOVLW
MOVWF
BSF
BSF
BSF
T
AD
:
:
1 T
The GO/DONE bit should NOT be set in the same instruction that turns on the A/D,
due to the required acquisition time.
Holding capacitor is disconnected
from analog input
show how to perform an A/D conversion. The RA pins are configured as analog
A/D Conversion T
AD
b7
STATUS, RP0
ADCON1
STATUS, RP0
0xC1
ADCON0
INTCON, ADIE
INTCON, GIE
ADCON0, GO
Doing an A/D Conversion
2 T
RC
. The conversion is performed on the RA0 channel.
AD
b6
3 T
AD
b5
REF
4 T
AD
; Select Bank1
; Configure A/D inputs
; Select Bank0
; RC Clock, A/D is on, Channel 0 selected
;
; Enable A/D Interrupt
; Enable all interrupts
; Start A/D Conversion
; The ADIF bit will be set and the GO/DONE bit
;
;
) is the device V
Cycles
b4
AD
is cleared upon completion of the
A/D Conversion.
5 T
Holding capacitor is connected to analog input
AD
b3
6 T
AD
DD
wait, an acquisition is automatically started
. The A/D interrupt is enabled, and the A/D
AD
b2
Next Q4: ADRES is loaded
7 T
AD
b1
8 T
GO bit is cleared
ADIF bit is set
b0
AD
9 T
DS31022A-page 22-11
AD
b0
AD
10
wait is required
T
AD
11
22
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