PIC16F77-I/LG Microchip Technology, PIC16F77-I/LG Datasheet - Page 53
![IC MCU FLASH 8KX14 W/AD 44PLCC](/photos/6/63/66325/150-44-plcc_sml.jpg)
PIC16F77-I/LG
Manufacturer Part Number
PIC16F77-I/LG
Description
IC MCU FLASH 8KX14 W/AD 44PLCC
Manufacturer
Microchip Technology
Series
PIC® 16Fr
Datasheets
1.PIC16F616T-ISL.pdf
(8 pages)
2.PIC16F688T-ISL.pdf
(688 pages)
3.PIC16F818-ISO.pdf
(6 pages)
4.PIC16F73-ISP.pdf
(174 pages)
5.PIC16F73-ISP.pdf
(14 pages)
6.PIC16F73-ISP.pdf
(12 pages)
Specifications of PIC16F77-I/LG
Core Processor
PIC
Core Size
8-Bit
Speed
20MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
33
Program Memory Size
14KB (8K x 14)
Program Memory Type
FLASH
Ram Size
368 x 8
Voltage - Supply (vcc/vdd)
4 V ~ 5.5 V
Data Converters
A/D 8x8b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
44-PLCC
For Use With
DVA16XL441 - ADAPTER DEVICE ICE 44PLCC
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
- PIC16F616T-ISL PDF datasheet
- PIC16F688T-ISL PDF datasheet #2
- PIC16F818-ISO PDF datasheet #3
- PIC16F73-ISP PDF datasheet #4
- PIC16F73-ISP PDF datasheet #5
- PIC16F73-ISP PDF datasheet #6
- Current page: 53 of 688
- Download datasheet (3Mb)
Figure 3-1: Simplified Block Diagram of a Super-set On-chip Reset Circuit
Note 1: This is a separate oscillator from the RC oscillator of the CLKIN pin or the INTRC oscillator.
1997 Microchip Technology Inc.
OSC1/
CLKIN
MCLR / V
MCLRE
Enable
V
I/O Pull-up
Pin
DD
2: Features in dashed boxes not available on all devices, see device’s Data Sheet.
3: In some devices, this pin may be configured as a general purpose Input.
4: The early PICmicro devices have the configuration bit defined as PWRTE = 1 is enabled, while all other
On-chip
devices the configuration bit is defined as PWRTE = 0 is enabled.
PP
RC OSC
OST/PWRT
Pin
Brown-out
Program
Memory
V
Module
(3)
(1)
Parity
detect
WDT
DD
Reset
rise
OST
PWRT
V
DD
Weak Pull-up
10-bit Ripple-counter
10-bit Ripple-counter
WDT Time-out
Power-on Reset
MPEEN
BODEN
SLEEP
MCLRE
(2)
(2)
(2)
(2)
Enable PWRT
Enable OST
(4)
See
Section 3. Reset
Table 3-1
for time-out situations.
S
R
DS31003A-page 3-3
Q
Chip_Reset
3
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