PIC16F77-I/LG Microchip Technology, PIC16F77-I/LG Datasheet - Page 470
![IC MCU FLASH 8KX14 W/AD 44PLCC](/photos/6/63/66325/150-44-plcc_sml.jpg)
PIC16F77-I/LG
Manufacturer Part Number
PIC16F77-I/LG
Description
IC MCU FLASH 8KX14 W/AD 44PLCC
Manufacturer
Microchip Technology
Series
PIC® 16Fr
Datasheets
1.PIC16F616T-ISL.pdf
(8 pages)
2.PIC16F688T-ISL.pdf
(688 pages)
3.PIC16F818-ISO.pdf
(6 pages)
4.PIC16F73-ISP.pdf
(174 pages)
5.PIC16F73-ISP.pdf
(14 pages)
6.PIC16F73-ISP.pdf
(12 pages)
Specifications of PIC16F77-I/LG
Core Processor
PIC
Core Size
8-Bit
Speed
20MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
33
Program Memory Size
14KB (8K x 14)
Program Memory Type
FLASH
Ram Size
368 x 8
Voltage - Supply (vcc/vdd)
4 V ~ 5.5 V
Data Converters
A/D 8x8b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
44-PLCC
For Use With
DVA16XL441 - ADAPTER DEVICE ICE 44PLCC
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
- PIC16F616T-ISL PDF datasheet
- PIC16F688T-ISL PDF datasheet #2
- PIC16F818-ISO PDF datasheet #3
- PIC16F73-ISP PDF datasheet #4
- PIC16F73-ISP PDF datasheet #5
- PIC16F73-ISP PDF datasheet #6
- Current page: 470 of 688
- Download datasheet (3Mb)
PICmicro MID-RANGE MCU FAMILY
25.4
DS31025A-page 25-12
COM0
COM1
COM2
COM3
T
T
FWR
FINT
LCD Interrupts
= T
= (T
Frame
Boundary
(T
FRAME
FWR
FWR
The LCD timing generation provides an interrupt that defines the LCD frame timing. This interrupt
can be used to coordinate the writing of the pixel data with the start of a new frame. Writing pixel
data at the frame boundary allows a visually crisp transition of the image. This interrupt can also
be used to synchronize external events to the LCD. For example, the interface to an external seg-
ment driver, such as a Microchip AY0438, can be synchronized for segment data update to the
LCD frame.
A new frame is defined to begin at the leading edge of the COM0 common signal. The interrupt
will be set immediately after the LCD controller completes accessing all pixel data required for a
frame. This will occur at a certain fixed time before the frame boundary as shown in
The LCD controller will begin to access data for the next frame within T
Figure 25-7:
/2 - (2T
/2 - (1T
/(LMUX1:LMUX0 + 1)
CY
CY
+ 40 ns))
+ 40 ns))
Example Waveforms in 1/4 MUX Drive
min.
max.
1 Frame
LCD
Interrupt
occurs
T
FWR
T
FINT
Controller accesses
next frame data
Frame
Boundary
1997 Microchip Technology Inc.
FWR
after the interrupt.
Figure
V3
V2
V1
V0
V3
V2
V1
V0
V3
V2
V1
V0
V3
V2
V1
V0
25-7.
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