AT89S52-24PI Atmel, AT89S52-24PI Datasheet - Page 27

IC MCU 8K FLASH 24MHZ 40-DIP

AT89S52-24PI

Manufacturer Part Number
AT89S52-24PI
Description
IC MCU 8K FLASH 24MHZ 40-DIP
Manufacturer
Atmel
Series
89Sr
Datasheet

Specifications of AT89S52-24PI

Core Processor
8051
Core Size
8-Bit
Speed
24MHz
Connectivity
UART/USART
Peripherals
WDT
Number Of I /o
32
Program Memory Size
8KB (8K x 8)
Program Memory Type
FLASH
Ram Size
256 x 8
Voltage - Supply (vcc/vdd)
4 V ~ 5.5 V
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
40-DIP (0.600", 15.24mm)
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Data Converters
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
AT89S52-24PI
Manufacturer:
ATM
Quantity:
5 704
Part Number:
AT89S52-24PI
Manufacturer:
ATM
Quantity:
5 704
Part Number:
AT89S52-24PI
Manufacturer:
ATMEL
Quantity:
958
Part Number:
AT89S52-24PI
Manufacturer:
ATMEL/爱特梅尔
Quantity:
20 000
Table 24-1.
Note:
1919D–MICRO–6/08
Instruction
Programming Enable
Chip Erase
Read Program Memory
(Byte Mode)
Write Program Memory
(Byte Mode)
Write Lock Bits
Read Lock Bits
Read Signature Bytes
Read Program Memory
(Page Mode)
Write Program Memory
(Page Mode)
1. B1 = 0, B2 = 0 ---> Mode 1, no lock protection
B1 = 0, B2 = 1 ---> Mode 2, lock bit 1 activated
B1 = 1, B2 = 0 ---> Mode 3, lock bit 2 activated
B1 = 1, B2 = 1 ---> Mode 4, lock bit 3 activated
Serial Programming Instruction Set
(1)
Instruction
Format
Byte 1
1010 1100
1010 1100
0010 0000
0100 0000
1010 1100
0010 0100
0010 1000
0011 0000
0101 0000
After Reset signal is high, SCK should be low for at least 64 system clocks before it goes high to
clock in the enable data bytes. No pulsing of Reset signal is necessary. SCK should be no faster
than 1/16 of the system clock at XTAL1.
For Page Read/Write, the data always starts from byte 0 to 255. After the command byte and
upper address byte are latched, each byte thereafter is treated as data until all 256 bytes are
shifted in/out. Then the next instruction will be ready to be decoded.
Byte 2
0101 0011
100x xxxx
xxx
xxx
1110 00
xxxx xxxx
xxx
xxx
xxx
}
Byte 3
xxxx xxxx
xxxx xxxx
xxxx xxxx
xxxx xxxx
Byte 0
Byte 0
xxx xxx0
Each of the lock bit modes needs to be activated sequentially
before Mode 4 can be executed.
Byte 4
xxxx xxxx
0110 1001
(Output on
MISO)
xxxx xxxx
xxxx xxxx
xxx
Signature Byte
Byte 1...
Byte 255
Byte 1...
Byte 255
xx
Operation
Enable Serial Programming
while RST is high
Chip Erase Flash memory
array
Read data from Program
memory in the byte mode
Write data to Program
memory in the byte mode
Write Lock bits. See Note (1).
Read back current status of
the lock bits (a programmed
lock bit reads back as a “1”)
Read Signature Byte
Read data from Program
memory in the Page Mode
(256 bytes)
Write data to Program
memory in the Page Mode
(256 bytes)
AT89S52
27

Related parts for AT89S52-24PI