ATMEGA162-16AC Atmel, ATMEGA162-16AC Datasheet - Page 148

• Manufacturer Part Number: ATMEGA162-16AC
• Description: IC MCU AVR 16K 5V 16MHZ 44-TQFP
• Manufacturer: Atmel
• Series: AVR® ATmegar

Specifications of ATMEGA162-16AC

• Core Processor: AVR
• Core Size: 8-Bit
• Speed: 16MHz
• Connectivity: EBI/EMI, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 35
• Program Memory Size: 16KB (8K x 16)
• Program Memory Type: FLASH
• Eeprom Size: 512 x 8
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Oscillator Type: Internal
• Operating Temperature: 0°C ~ 70°C
• Package / Case: 44-TQFP, 44-VQFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Data Converters: -

148
ATmega162(V/U/L)
• Bit 5:4 – COM21:0: Compare Match Output Mode
These bits control the Output Compare pin (OC2) behavior. If one or both of the
COM21:0 bits are set, the OC2 output overrides the normal port functionality of the I/O
pin it is connected to. However, note that the Data Direction Register (DDR) bit corre-
sponding to OC2 pin must be set in order to enable the output driver.
When OC2 is connected to the pin, the function of the COM21:0 bits depends on the
WGM21:0 bit setting. Table 61 shows the COM21:0 bit functionality when the WGM21:0
bits are set to a normal or CTC mode (non-PWM).
Table 61. Compare Output Mode, non-PWM Mode
Table 62 shows the COM21:0 bit functionality when the WGM21:0 bits are set to fast
PWM mode.
Table 62. Compare Output Mode, Fast PWM Mode
Note:
Table 63 shows the COM21:0 bit functionality when the WGM21:0 bits are set to phase
correct PWM mode.
Table 63. Compare Output Mode, Phase Correct PWM Mode
Note:
COM21
COM21
COM21
0
0
1
1
0
0
1
1
0
0
1
1
1. A special case occurs when OCR2 equals TOP and COM21 is set. In this case, the
1. A special case occurs when OCR2 equals TOP and COM21 is set. In this case, the
COM20
compare match is ignored, but the set or clear is done at TOP. See “Fast PWM Mode”
on page 143 for more details.
compare match is ignored, but the set or clear is done at TOP. See “Phase Correct
PWM Mode” on page 144 for more details.
0
1
0
1
COM20
COM20
0
1
0
1
0
1
0
1
Description
Normal port operation, OC2 disconnected.
Reserved
Clear OC2 on compare match when up-counting. Set OC2 on compare
match when downcounting.
Set OC2 on compare match when up-counting. Clear OC2 on compare
match when downcounting.
Description
Normal port operation, OC2 disconnected.
Reserved
Clear OC2 on compare match, set OC2 at TOP.
Set OC2 on compare match, clear OC2 at TOP.
Description
Normal port operation, OC2 disconnected.
Toggle OC2 on compare match.
Clear OC2 on compare match.
Set OC2 on compare match.
(1)
(1)
2513C–AVR–09/02