ATMEGA162-16MC Atmel, ATMEGA162-16MC Datasheet - Page 141
![IC MCU AVR 16K 5V 16MHZ 44-QFN](/photos/12/13/121316/313-44-qfn_sml.jpg)
ATMEGA162-16MC
Manufacturer Part Number
ATMEGA162-16MC
Description
IC MCU AVR 16K 5V 16MHZ 44-QFN
Manufacturer
Atmel
Series
AVR® ATmegar
Specifications of ATMEGA162-16MC
Core Processor
AVR
Core Size
8-Bit
Speed
16MHz
Connectivity
EBI/EMI, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
35
Program Memory Size
16KB (8K x 16)
Program Memory Type
FLASH
Eeprom Size
512 x 8
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Oscillator Type
Internal
Operating Temperature
0°C ~ 70°C
Package / Case
44-VQFN Exposed Pad
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Data Converters
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Compare Output Mode and
Waveform Generation
Modes of Operation
Normal Mode
2513C–AVR–09/02
The design of the Output Compare pin logic allows initialization of the OC2 state before
the output is enabled. Note that some COM21:0 bit settings are reserved for certain
modes of operation. See “8-bit Timer/Counter Register Description” on page 147.
The Waveform Generator uses the COM21:0 bits differently in Normal, CTC, and PWM
modes. For all modes, setting the COM21:0 = 0 tells the Waveform Generator that no
action on the OC2 Register is to be performed on the next compare match. For compare
output actions in the non-PWM modes refer to Table 61 on page 148. For fast PWM
mode, refer to Table 62 on page 148, and for phase correct PWM refer to Table 63 on
page 148.
A change of the COM21:0 bits state will have effect at the first compare match after the
bits are written. For non-PWM modes, the action can be forced to have immediate effect
by using the FOC2 strobe bits.
The mode of operation, i.e., the behavior of the Timer/Counter and the Output Compare
pins, is defined by the combination of the Waveform Generation mode (WGM21:0) and
Compare Output mode (COM21:0) bits. The Compare Output mode bits do not affect
the counting sequence, while the Waveform Generation mode bits do. The COM21:0
bits control whether the PWM output generated should be inverted or not (inverted or
non-inverted PWM). For non-PWM modes the COM21:0 bits control whether the output
should be set, cleared, or toggled at a compare match (See “Compare Match Output
Unit” on page 140.).
For detailed timing information refer to “Timer/Counter Timing Diagrams” on page 145.
The simplest mode of operation is the Normal mode (WGM21:0 = 0). In this mode the
counting direction is always up (incrementing), and no counter clear is performed. The
counter simply overruns when it passes its maximum 8-bit value (TOP = 0xFF) and then
restarts from the bottom (0x00). In normal operation the Timer/Counter Overflow Flag
(TOV2) will be set in the same timer clock cycle as the TCNT2 becomes zero. The
TOV2 flag in this case behaves like a ninth bit, except that it is only set, not cleared.
However, combined with the timer overflow interrupt that automatically clears the TOV2
flag, the timer resolution can be increased by software. There are no special cases to
consider in the normal mode, a new counter value can be written anytime.
The Output Compare unit can be used to generate interrupts at some given time. Using
the Output Compare to generate waveforms in Normal mode is not recommended,
since this will occupy too much of the CPU time.
ATmega162(V/U/L)
141
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