PIC18F4431-E/ML Microchip Technology, PIC18F4431-E/ML Datasheet - Page 267

• Manufacturer Part Number: PIC18F4431-E/ML
• Description: IC MCU FLASH 8KX16 44QFN
• Manufacturer: Microchip Technology
• Series: PIC® 18Fr

Specifications of PIC18F4431-E/ML

• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 40MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, LVD, Power Control PWM, QEI, POR, PWM, WDT
• Number Of I /o: 36
• Program Memory Size: 16KB (8K x 16)
• Program Memory Type: FLASH
• Eeprom Size: 256 x 8
• Ram Size: 768 x 8
• Voltage - Supply (vcc/vdd): 4.2 V ~ 5.5 V
• Data Converters: A/D 9x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 44-QFN
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

REGISTER 23-4:
 2010 Microchip Technology Inc.
bit 7
Legend:
R = Readable bit
-n = Value when device is unprogrammed
bit 7-6
bit 5
bit 4
bit 3
bit 2
bit 1-0
Note 1:
U-0
—
2:
3:
Polarity control bits, HPOL and LPOL, define PWM signal output active and inactive states; PWM states
generated by the Fault inputs or PWM manual override.
PWM6 and PWM7 output channels are only available on PIC18F4331/4431 devices.
When PWMPIN = 0, PWMEN<2:0> = 101 if the device has eight PWM output pins (40 and 44-pin
devices) and PWMEN<2:0> = 100 if the device has six PWM output pins (28-pin devices). PWM output
polarity is defined by HPOL and LPOL.
Unimplemented: Read as ‘0’
T1OSCMX: Timer1 Oscillator Mode bit
1 = Low-power Timer1 operation when microcontroller is in Sleep mode
0 = Standard (legacy) Timer1 oscillator operation
HPOL: High Side Transistors Polarity bit (i.e., Odd PWM Output Polarity Control bit)
1 = PWM1, 3, 5 and 7 are active-high (default)
0 = PWM1, 3, 5 and 7 are active-low
LPOL: Low Side Transistors Polarity bit (i.e., Even PWM Output Polarity Control bit)
1 = PWM0, 2, 4 and 6 are active-high (default)
0 = PWM0, 2, 4 and 6 are active-low
PWMPIN: PWM Output Pins Reset State Control bit
1 = PWM outputs are disabled upon Reset (default)
0 = PWM outputs drive active states upon Reset
Unimplemented: Read as ‘0’
—
U
CONFIG3L: CONFIGURATION REGISTER 3 LOW (BYTE ADDRESS 300004h)
P = Programmable bit
T1OSCMX
R/P-1
PIC18F2331/2431/4331/4431
HPOL
R/P-1
(2)
(2)
(1)
U = Unimplemented bit, read as ‘0’
U = Unchanged from programmed state
LPOL
(2)
(2)
R/P-1
(3)
(1)
PWMPIN
R/P-1
(3)
—
U
DS39616D-page 267
(1)
(1)
—
U
bit 0