ATMEGA128L-8MJ Atmel, ATMEGA128L-8MJ Datasheet - Page 210
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ATMEGA128L-8MJ
Manufacturer Part Number
ATMEGA128L-8MJ
Description
IC MCU AVR 128K 8MHZ LV 64-QFN
Manufacturer
Atmel
Series
AVR® ATmegar
Specifications of ATMEGA128L-8MJ
Core Processor
AVR
Core Size
8-Bit
Speed
8MHz
Connectivity
EBI/EMI, I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
53
Program Memory Size
128KB (64K x 16)
Program Memory Type
FLASH
Eeprom Size
4K x 8
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
64-MLF®, 64-QFN
For Use With
ATSTK501 - ADAPTER KIT FOR 64PIN AVR MCU
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
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ATmega128
Even though this example is simple, it shows the principles involved in all TWI transmissions.
These can be summarized as follows:
•
•
•
In the following an assembly and C implementation of the example is given. Note that the code
below assumes that several definitions have been made for example by using include-files.
When the TWI has finished an operation and expects application response, the TWINT flag
is set. The SCL line is pulled low until TWINT is cleared.
When the TWINT flag is set, the user must update all TWI Registers with the value relevant
for the next TWI bus cycle. As an example, TWDR must be loaded with the value to be
transmitted in the next bus cycle.
After all TWI Register updates and other pending application software tasks have been
completed, TWCR is written. When writing TWCR, the TWINT bit should be set. Writing a
one to TWINT clears the flag. The TWI will then commence executing whatever operation
was specified by the TWCR setting.
2467V–AVR–02/11
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