AT80C51RD2-SLSIM Atmel, AT80C51RD2-SLSIM Datasheet - Page 61

IC MCU 8051 5V SPI 20MHZ 44-PLCC

AT80C51RD2-SLSIM

Manufacturer Part Number
AT80C51RD2-SLSIM
Description
IC MCU 8051 5V SPI 20MHZ 44-PLCC
Manufacturer
Atmel
Series
80Cr
Datasheet

Specifications of AT80C51RD2-SLSIM

Core Processor
8051
Core Size
8-Bit
Speed
40MHz
Connectivity
UART/USART
Peripherals
POR, PWM, WDT
Number Of I /o
32
Program Memory Type
ROMless
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
44-PLCC
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Program Memory Size
-
Data Converters
-

Available stocks

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Part Number
Manufacturer
Quantity
Price
Part Number:
AT80C51RD2-SLSIM
Manufacturer:
Atmel
Quantity:
10 000
17. Reduced EMI Mode
4113D–8051–01/09
The ALE signal is used to demultiplex address and data buses on port 0 when used with exter-
nal program or data memory. Nevertheless, during internal code execution, ALE signal is still
generated. In order to reduce EMI, ALE signal can be disabled by setting AO bit.
The AO bit is located in AUXR register at bit location 0. As soon as AO is set, ALE is no longer
output but remains active during MOVX and MOVC instructions and external fetches. During
ALE disabling, ALE pin is weakly pulled high.
Table 17-1.
AUXR - Auxiliary Register (8Eh)
Number
Bit
7
7
6
5
4
3
2
1
0
-
AUXR Register
Mnemonic Description
EXTRAM
XRS1
XRS0
Bit
M0
AO
6
-
-
-
-
Reserved
The value read from this bit is indeterminate. Do not set this bit
Reserved
The value read from this bit is indeterminate. Do not set this bit
Pulse length
Cleared to stretch MOVX control: the RD and the WR pulse length is 6 clock
periods (default).
Set to stretch MOVX control: the RD and the WR pulse length is 30 clock
periods.
Reserved
The value read from this bit is indeterminate. Do not set this bit
XRAM Size
XRS1XRS0XRAM Size
0
0
1
1
EXTRAM bit
Cleared to access internal XRAM using movx @ Ri/ @ DPTR.
Set to access external memory.
Programmed by hardware after Power-up regarding Hardware Security Byte
(HSB), default setting, XRAM selected.
ALE Output bit
Cleared, ALE is emitted at a constant rate of 1/6 the oscillator frequency (or 1/3 if
X2 mode is used) (default). Set, ALE is active only during a MOVX or MOVC
instructione is used.
0256 bytes (default)
1512 bytes
0768 bytes
11024 bytes
M0
5
4
-
XRS1
3
XRS0
2
AT80C51RD2
EXTRAM
1
AO
0
61

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