AT80C51RD2-RLTIM Atmel, AT80C51RD2-RLTIM Datasheet - Page 45

IC MCU 8051 5V SPI 20MHZ 44-VQFP

AT80C51RD2-RLTIM

Manufacturer Part Number
AT80C51RD2-RLTIM
Description
IC MCU 8051 5V SPI 20MHZ 44-VQFP
Manufacturer
Atmel
Series
80Cr
Datasheet

Specifications of AT80C51RD2-RLTIM

Core Processor
8051
Core Size
8-Bit
Speed
40MHz
Connectivity
UART/USART
Peripherals
POR, PWM, WDT
Number Of I /o
32
Program Memory Type
ROMless
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
44-TQFP, 44-VQFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Program Memory Size
-
Data Converters
-

Available stocks

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Part Number:
AT80C51RD2-RLTIM
Manufacturer:
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Quantity:
10 000
12. Interrupt System
Figure 12-1. Interrupt Control System
12.1
4113D–8051–01/09
Registers
EXF2
KBD IT
INT0
INT1
PCA IT
TF0
TF1
TF2
RI
TI
The AT80C51RD2 have a total of 8 interrupt vectors: two external interrupts (INT0 and INT1),
three timer interrupts (timers 0, 1 and 2), the serial port interrupt, Keyboard interrupt and the
PCA global interrupt. These interrupts are shown in Figure 12-1.
Each of the interrupt sources can be individually enabled or disabled by setting or clearing a bit
in the Interrupt Enable register
disable bit, which must be cleared to disable all interrupts at once.
Each interrupt source also can be individually programmed to one out of four priority levels by
setting or clearing a bit in the Interrupt Priority register
High register
with each combination.
The PCA interrupt vector is located at address 0033H, the Keyboard interrupt vector is located
at address 004BH. All other vectors addresses are the same as standard C52 devices.
Individual Enable
(Table 12-4
IE0
IE1
and
IPH, IPL
(Table 12-5
Table
12-5) shows the bit values and priority levels associated
Global Disable
3
0
3
0
3
0
3
0
3
0
3
0
3
0
3
0
and
Table
12-3). This register also contains a global
(Table
12-6) and in the Interrupt Priority
High Priority
Interrupt
AT80C51RD2
Interrupt
Polling
Sequence, Decreasing from
High to Low Priority
Low Priority
Interrupt
45

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