AT80C51RD2-RLTIM Atmel, AT80C51RD2-RLTIM Datasheet - Page 55

IC MCU 8051 5V SPI 20MHZ 44-VQFP

AT80C51RD2-RLTIM

Manufacturer Part Number
AT80C51RD2-RLTIM
Description
IC MCU 8051 5V SPI 20MHZ 44-VQFP
Manufacturer
Atmel
Series
80Cr
Datasheet

Specifications of AT80C51RD2-RLTIM

Core Processor
8051
Core Size
8-Bit
Speed
40MHz
Connectivity
UART/USART
Peripherals
POR, PWM, WDT
Number Of I /o
32
Program Memory Type
ROMless
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
44-TQFP, 44-VQFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Program Memory Size
-
Data Converters
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
AT80C51RD2-RLTIM
Manufacturer:
Atmel
Quantity:
10 000
4113D–8051–01/09
Table 13-3.
KBLS - Keyboard Level Selector Register (9Ch)
Reset Value = 0000 0000b
Number
KBLS7
Bit
7
7
6
5
4
3
2
1
0
KBLS Register
Mnemonic Description
KBLS6
KBLS7
KBLS6
KBLS5
KBLS4
KBLS3
KBLS2
KBLS1
KBLS0
Bit
6
Keyboard line 7 level selection bit
Cleared to enable a low level detection on Port line 7.
Set to enable a high level detection on Port line 7.
Keyboard line 6 level selection bit
Cleared to enable a low level detection on Port line 6.
Set to enable a high level detection on Port line 6.
Keyboard line 5 level selection bit
Cleared to enable a low level detection on Port line 5.
Set to enable a high level detection on Port line 5.
Keyboard line 4 level selection bit
Cleared to enable a low level detection on Port line 4.
Set to enable a high level detection on Port line 4.
Keyboard line 3 level selection bit
Cleared to enable a low level detection on Port line 3.
Set to enable a high level detection on Port line 3.
Keyboard line 2 level selection bit
Cleared to enable a low level detection on Port line 2.
Set to enable a high level detection on Port line 2.
Keyboard line 1 level selection bit
Cleared to enable a low level detection on Port line 1.
Set to enable a high level detection on Port line 1.
Keyboard line 0 level selection bit
Cleared to enable a low level detection on Port line 0.
Set to enable a high level detection on Port line 0.
KBLS5
5
KBLS4
4
KBLS3
3
KBLS2
2
AT80C51RD2
KBLS1
1
KBLS0
0
55

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