AT91SAM7A2-AU Atmel, AT91SAM7A2-AU Datasheet - Page 9
![IC ARM7 MCU 32BIT ROMLESS176LQFP](/photos/12/32/123243/313-176-lqfp_sml.jpg)
AT91SAM7A2-AU
Manufacturer Part Number
AT91SAM7A2-AU
Description
IC ARM7 MCU 32BIT ROMLESS176LQFP
Manufacturer
Atmel
Series
AT91SAMr
Specifications of AT91SAM7A2-AU
Core Processor
ARM7
Core Size
16/32-Bit
Speed
30MHz
Connectivity
CAN, EBI/EMI, SPI, UART/USART
Peripherals
POR, PWM, WDT
Number Of I /o
57
Program Memory Type
ROMless
Ram Size
16K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
176-LQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
GPT: General
Purpose Timer
ST: Simple Timer
CAPT: Capture
Module
PWM: Pulse Width
Modulation
WT: Watch Timer
WD: Watch Dog
SFM: Special
Function Module
6021BS–ATARM–06-Jul-04
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The AT91SAM7A2 features four General Purpose Timers. Each timer can be independently
programmed to perform a wide range of functions including frequency measurement, event
counting, interval measurement, pulse generation, delay timing and pulse width modulation.
Each General Purpose Timer has one external clock input, five internal clock inputs, and three
multi-purpose input/output signals which can be configured by the user. Each timer drives an
internal interrupt signal which can be programmed to generate processor interrupts via the
AIC (Advanced Interrupt Controller).
Three General Purpose Timers are grouped in the same block. This block has two global reg-
isters which act upon all three GPTs. The Block Control Register allows the three timers to be
started simultaneously with the same instruction. The Block Mode Register defines the exter-
nal clock inputs for each timer, allowing them to be chained.
Simple Timers provide basic functions for timing calculation. Each channel of this timer has a
specific prescalar and a 16-bit counter. The prescalar defines the clock frequency of the chan-
nel counter. The 16-bit counter starts down-counting when a value different than zero is
loaded. An interrupt is generated when the counter is null.
The capture module is a frame analyzer. It stores the period of time between two edges of a
signal in a register. This period is described as a number of counter cycles. The capture allows
data transfers with the PDC.
The AT91SAM7A2 includes four PWM channels. Each channel can generate pulses. The fre-
quency and the duty cycle of each channel can be configured.
The watch timer provides a seconds counter and an alarm function. The alarm register has a
resolution of 30.5 µs. This allows a 32-bit register to have sufficient range to cater for a 24 or
36 hour period.
The AT91SAM7A2 has an internal watchdog which can be used to prevent system lock-up if
the software becomes trapped in a deadlock.
The AT91SAM7A2 provides registers which implement the following special functions.
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Automatic Reply After Receive a Remote Frame
Time Stamp on Each Transfer
Multicast Reception with Time Synchronization
Continuous Reception Mode
Chip Identification
RESET Status
AT91SAM7A2 - Summary
PRELIMINARY
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