DSPIC30F4013T-20I/ML Microchip Technology, DSPIC30F4013T-20I/ML Datasheet - Page 146

• Manufacturer Part Number: DSPIC30F4013T-20I/ML
• Description: IC DSPIC MCU/DSP 48K 44QFN
• Manufacturer: Microchip Technology
• Series: dsPIC™ 30Fr

Specifications of DSPIC30F4013T-20I/ML

• Core Processor: dsPIC
• Core Size: 16-Bit
• Speed: 20 MIPS
• Connectivity: CAN, I²C, SPI, UART/USART
• Peripherals: AC'97, Brown-out Detect/Reset, I²S, POR, PWM, WDT
• Number Of I /o: 30
• Program Memory Size: 48KB (16K x 24)
• Program Memory Type: FLASH
• Eeprom Size: 1K x 8
• Ram Size: 2K x 8
• Voltage - Supply (vcc/vdd): 2.5 V ~ 5.5 V
• Data Converters: A/D 13x12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 44-QFN
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Other names: DSPIC30F4013T20IM

dsPIC30F3014/4013
Table 20-4 shows the Reset conditions for the RCON
register. Since the control bits within the RCON register
are R/W, the information in the table implies that all the
bits are negated prior to the action specified in the
condition column.
TABLE 20-4:
Table 20-5 shows a second example of the bit
conditions for the RCON register. In this case, it is not
assumed the user has set/cleared specific bits prior to
action specified in the condition column.
TABLE 20-5:
DS70138C-page 144
Power-on Reset
Brown-out Reset
MCLR Reset during normal
operation
Software Reset during
normal operation
MCLR Reset during Sleep
MCLR Reset during Idle
WDT Time-out Reset
WDT Wake-up
Interrupt Wake-up from Sleep
Clock Failure Trap
Trap Reset
Illegal Operation Trap
Legend:
Note 1:
Power-on Reset
Brown-out Reset
MCLR Reset during normal
operation
Software Reset during
normal operation
MCLR Reset during Sleep
MCLR Reset during Idle
WDT Time-out Reset
WDT Wake-up
Interrupt Wake-up from Sleep
Clock Failure Trap
Trap Reset
Illegal Operation Reset
Legend:
Note 1:
Condition
Condition
u = unchanged, x = unknown, - = unimplemented bit, read as ‘0’
When the wake-up is due to an enabled interrupt, the PC is loaded with the corresponding interrupt vector.
u = unchanged, x = unknown, - = unimplemented bit, read as ‘0’
When the wake-up is due to an enabled interrupt, the PC is loaded with the corresponding interrupt vector.
INITIALIZATION CONDITION FOR RCON REGISTER: CASE 1
INITIALIZATION CONDITION FOR RCON REGISTER: CASE 2
0x000000
0x000000
0x000000
0x000000
0x000000
0x000000
0x000000
0x000004
0x000000
0x000000
0x000000
0x000000
0x000000
0x000000
0x000000
0x000000
0x000000
0x000004
0x000000
0x000000
PC + 2
PC + 2
Program
Program
Counter
Counter
PC + 2
PC + 2
(1)
(1)
Advance Information
TRAPR IOPUWR EXTR SWR WDTO Idle Sleep POR BOR
TRAPR IOPUWR EXTR SWR WDTO Idle Sleep POR BOR
0
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 2004 Microchip Technology Inc.
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