ATMEGA16-16AUR Atmel, ATMEGA16-16AUR Datasheet - Page 80
ATMEGA16-16AUR
Manufacturer Part Number
ATMEGA16-16AUR
Description
MCU AVR 128KB FLASH 16MHZ 44TQFP
Manufacturer
Atmel
Series
AVR® ATmegar
Datasheet
1.ATMEGA16L-8MI.pdf
(357 pages)
Specifications of ATMEGA16-16AUR
Core Processor
AVR
Core Size
8-Bit
Speed
16MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
32
Program Memory Size
16KB (8K x 16)
Program Memory Type
FLASH
Eeprom Size
512 x 8
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
44-TQFP, 44-VQFP
For Use With
ATSTK600-TQFP44 - STK600 SOCKET/ADAPTER 44-TQFPATSTK500 - PROGRAMMER AVR STARTER KIT
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
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Manufacturer
Quantity
Price
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2466T–AVR–07/10
PWM frequency for the output when using phase correct PWM can be calculated by the follow-
ing equation:
The N variable represents the prescale factor (1, 8, 64, 256, or 1024).
The extreme values for the OCR0 Register represent special cases when generating a PWM
waveform output in the phase correct PWM mode. If the OCR0 is set equal to BOTTOM, the out-
put will be continuously low and if set equal to MAX the output will be continuously high for non-
inverted PWM mode. For inverted PWM the output will have the opposite logic values.
At the very start of Period 2 in
is no Compare Match. The point of this transition is to guarantee symmetry around BOTTOM.
There are two cases that give a transition without Compare Match:
•
•
OCR0A changes its value from MAX, like in
OCn pin value is the same as the result of a down-counting Compare Match. To ensure
symmetry around BOTTOM the OCn value at MAX must be correspond to the result of an
up-counting Compare Match.
The Timer starts counting from a value higher than the one in OCR0A, and for that reason
misses the Compare Match and hence the OCn change that would have happened on the
way up.
Figure 33
f
OCnPCPWM
OCn has a transition from high to low even though there
Figure
=
----------------- -
N 510
f
clk_I/O
⋅
33. When the OCR0A value is MAX the
ATmega16(L)
80
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