Z86D7308PSC1987 Zilog, Z86D7308PSC1987 Datasheet - Page 27

IC 32K OTP 3 VOLT 40-DIP

Z86D7308PSC1987

Manufacturer Part Number
Z86D7308PSC1987
Description
IC 32K OTP 3 VOLT 40-DIP
Manufacturer
Zilog
Series
Z8® IRr
Datasheet

Specifications of Z86D7308PSC1987

Core Processor
Z8
Core Size
8-Bit
Speed
8MHz
Peripherals
Brown-out Detect/Reset, LVD, POR, WDT
Number Of I /o
31
Program Memory Size
32KB (32K x 8)
Program Memory Type
OTP
Ram Size
236 x 8
Voltage - Supply (vcc/vdd)
2 V ~ 3.6 V
Oscillator Type
Internal
Operating Temperature
0°C ~ 70°C
Package / Case
40-DIP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Data Converters
-
Connectivity
-
PS019401-1102
Port 1 (P17–P10)
Open-Drain
OEN
Out
In
Port 1 (see Figure 11) is a multiplexed Address (A7–A0) and Data (D7–D0),
CMOS-compatible port. Port 1 is dedicated to the ZiLOG ZBus
ory interface. The operations of Port 1 are supported by the Address Strobe (AS)
and Data Strobe (DS) lines and by the Read/Write (R/W) and Data Memory (DM)
control lines. Data memory read/write operations are done through this port. If
more than 256 external locations are required, Port 0 outputs the additional lines.
Port 1 can be placed in the high-impedance state along with Port 0, AS, DS, and
R/W, allowing the Z86D73 to share common resources in multiprocessor and
DMA applications. Port 1 can also be configured for standard port output mode.
After POR, Port 1 is configured as an input port. The output drivers are either
push-pull or open-drain and are controlled by bit D1 in the PCON register.
Figure 11. Port 1 Configuration
Z86D73
OTP
P
R
E
L
I
8
M
I
Port 1 (I/O or AD7–AD0)
N
A
40/44/48-Pin Low-Voltage IR OTP
R
Y
®
Mask
Option
-compatible mem-
Pad
V
CC
Resistive
transistor
pull-up
Z86D73
21

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