ST7FLITE19F1B6 STMicroelectronics, ST7FLITE19F1B6 Datasheet - Page 113
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ST7FLITE19F1B6
Manufacturer Part Number
ST7FLITE19F1B6
Description
IC MCU 8BIT 4K 20-DIP
Manufacturer
STMicroelectronics
Series
ST7r
Datasheet
1.ST7FLITE15F1M6.pdf
(131 pages)
Specifications of ST7FLITE19F1B6
Core Processor
ST7
Core Size
8-Bit
Speed
8MHz
Connectivity
SPI
Peripherals
LVD, POR, PWM, WDT
Number Of I /o
15
Program Memory Size
4KB (4K x 8)
Program Memory Type
FLASH
Eeprom Size
128 x 8
Ram Size
256 x 8
Voltage - Supply (vcc/vdd)
2.4 V ~ 5.5 V
Data Converters
A/D 7x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
20-DIP (0.300", 7.62mm)
Processor Series
ST7FLITE1x
Core
ST7
Data Bus Width
8 bit
Data Ram Size
256 B
Interface Type
SPI
Maximum Clock Frequency
8 MHz
Number Of Programmable I/os
15
Number Of Timers
1 x 12 bit / 2 x 8 bit
Operating Supply Voltage
2.4 V to 5.5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
Through Hole
Development Tools By Supplier
ST7FLIT2-COS/COM, ST7FLITE-SK/RAIS, ST7MDT10-DVP3, ST7MDT10-EMU3, STX-RLINK
Minimum Operating Temperature
- 40 C
On-chip Adc
7 bit x 10 bit
For Use With
497-5858 - EVAL BOARD PLAYBACK ST7FLITE497-5049 - KIT STARTER RAISONANCE ST7FLITE
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
497-2132-5
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
ST7FLITE19F1B6
Manufacturer:
STMicroelectronics
Quantity:
135
COMMUNICATION INTERFACE CHARACTERISTICS (Cont’d)
Figure 85. SPI Slave Timing Diagram with CPHA=1
Figure 86. SPI Master Timing Diagram
Notes:
1. Measurement points are done at CMOS levels: 0.3xV
2. When no communication is on-going the data output line of the SPI (MOSI in master mode, MISO in slave mode) has
its alternate function capability released. In this case, the pin status depends of the I/O port configuration.
MISO
MOSI
MISO
MOSI
SS
CPHA=0
CPOL=0
CPHA=0
CPOL=1
OUTPUT
INPUT
SS
INPUT
CPHA=0
CPOL=0
CPHA=0
CPOL=1
CPHA=1
CPOL=0
CPHA=1
CPOL=1
INPUT
OUTPUT
INPUT
see
note 2
see note 2
t
a(SO)
t
su(SS)
HZ
t
t
t
v(MO)
w(SCKH)
w(SCKL)
t
su(MI)
t
su(SI)
MSB OUT
MSB IN
MSB OUT
t
h(MO)
t
MSB IN
h(MI)
1)
t
h(SI)
t
c(SCK)
t
c(SCK)
t
t
t
v(SO)
w(SCKH)
w(SCKL)
DD
and 0.7xV
BIT6 OUT
1)
BIT6 OUT
BIT6 IN
DD
.
BIT1 IN
t
h(SO)
t
t
t
t
r(SCK)
f(SCK)
r(SCK)
f(SCK)
LSB OUT
LSB IN
LSB OUT
LSB IN
t
h(SS)
ST7LITE1
t
see note 2
dis(SO)
113/131
note 2
see