UPSD3454E-40T6 STMicroelectronics, UPSD3454E-40T6 Datasheet - Page 287
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UPSD3454E-40T6
Manufacturer Part Number
UPSD3454E-40T6
Description
MCU 8BIT 8032 256K FLASH 52-TQFP
Manufacturer
STMicroelectronics
Series
µPSDr
Datasheet
1.UPSD3422EV-40U6.pdf
(300 pages)
Specifications of UPSD3454E-40T6
Core Processor
8032
Core Size
8-Bit
Speed
40MHz
Connectivity
I²C, IrDA, SPI, UART/USART, USB
Peripherals
LVD, POR, PWM, WDT
Number Of I /o
35
Program Memory Size
288KB (288K x 8)
Program Memory Type
FLASH
Ram Size
32K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
52-TQFP, 52-VQFP
For Use With
497-5518 - EVAL BOARD RFID READER
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
UPSD3454E-40T6
Manufacturer:
STMicroelectronics
Quantity:
10 000
- Current page: 287 of 300
- Download datasheet (3Mb)
UPSD3422, UPSD3433, UPSD3434, UPSD3454
Table 234. ISC timing (5 V PSD module) (continued)
1. For non-PLD programming, erase or in ISC bypass mode.
2. For program or erase PLD only.
Table 235. ISC timing (3 V PSD module)
1. For non-PLD programming, erase or in ISC bypass mode.
2. For program or erase PLD only.
Figure 108. MCU module AC measurement I/O waveform
1. AC inputs during testing are driven at V
2. Timing measurements are made at V
Figure 109. PSD
1. For timing purposes, a port pin is considered to be no longer floating when a 100 mV change from load
2. I
Symbol
Symbol
t
t
t
t
t
t
t
t
t
t
ISCPCO
ISCPCO
ISCPZV
ISCPVZ
t
t
ISCCFP
ISCCHP
ISCPSU
t
t
ISCCLP
ISCPZV
ISCPVZ
ISCCH
ISCCF
ISCCL
ISCPH
voltage occurs, and begins to float when a 100 mV change from the loaded V
OL
and I
ISC port clock to output
ISC port high-impedance to valid output
ISC port valid output to high-impedance
Clock (TCK, PC1) frequency (except for PLD)
Clock (TCK, PC1) high time (except for PLD)
Clock (TCK, PC1) low time (except for PLD)
Clock (TCK, PC1) frequency (PLD only)
Clock (TCK, PC1) high time (PLD only)
Clock (TCK, PC1) low time (PLD only)
ISC port setup time
ISC port hold up time
ISC port clock to output
ISC port high-impedance to valid output
ISC port valid output to high-impedance
OH
≥
20 mA
m
odule AC float I/O waveform
V CC – 0.5V
0.2 V CC – 0.1V
Parameter
V LOAD + 0.1V
V LOAD – 0.1V
Parameter
0.45V
IH
(min) for a logic '1,' and V
CC
–0.5 V for a logic '1,' and 0.45 V for a logic '0.'
Test Reference Points
0.2 V CC + 0.9V
0.2 V CC – 0.1V
Test Points
Conditions
Conditions
IL
(max) for a logic '0'
(1)
(2)
V OH – 0.1V
V OL + 0.1V
AI06651
AI06650
OH
DC and AC parameters
or V
Min
Min
40
40
90
90
12
5
OL
level occurs
Max
16
30
30
30
Max
4
21
21
21
287/300
MHz
MHz
Unit
ns
ns
ns
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
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