UPSD3234A-40U6T STMicroelectronics, UPSD3234A-40U6T Datasheet - Page 151
UPSD3234A-40U6T
Manufacturer Part Number
UPSD3234A-40U6T
Description
IC MCU 8032 64KB FLASH 80TQFP
Manufacturer
STMicroelectronics
Series
µPSDr
Datasheet
1.UPSD3234A-40U6T.pdf
(189 pages)
Specifications of UPSD3234A-40U6T
Core Processor
8032
Core Size
8-Bit
Speed
40MHz
Connectivity
I²C, UART/USART, USB
Peripherals
LVR, POR, PWM, WDT
Number Of I /o
46
Program Memory Size
288KB (288K x 8)
Program Memory Type
FLASH
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 4x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
80-TQFP, 80-VQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Available stocks
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Part Number
Manufacturer
Quantity
Price
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Part Number:
UPSD3234A-40U6T
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UPSD3234A, UPSD3234BV, UPSD3233B, UPSD3233BV
Table 106. Status during Power-on RESET, Warm RESET and Power-down mode
1. The SR_cod and Periphmode Bits in the VM Register are always cleared to '0' on Power-on RESET or
MCU I/O
PLD Output
Address Out
Peripheral I/O
PMMR0 and PMMR2
Macrocells flip-flop
status
VM Register
All other registers
Port Configuration
Warm RESET.
Register
(1)
Input mode
Valid after internal PSD
configuration bits are
loaded
Tri-stated
Tri-stated
Cleared to '0'
Cleared to '0' by
internal Power-on
RESET
Initialized, based on the
selection in PSDsoft
Configuration menu
Cleared to '0'
Power-On RESET
Power-On RESET
Input mode
Valid
Tri-stated
Tri-stated
Unchanged
Depends on .re and .pr
equations
Initialized, based on the
selection in PSDsoft
Configuration menu
Cleared to '0'
RESET timing and device status at reset
Warm RESET
Warm RESET
Unchanged
Depends on inputs to
PLD (addresses are
blocked in PD mode)
Not defined
Tri-stated
Unchanged
Depends on .re and .pr
equations
Unchanged
Unchanged
Power-down mode
Power-down mode
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