MC68HC705P6ACDW Freescale Semiconductor, MC68HC705P6ACDW Datasheet - Page 67

• Manufacturer Part Number: MC68HC705P6ACDW
• Description: IC MCU 2.1MHZ 4.5K OTP 28-SOIC
• Manufacturer: Freescale Semiconductor
• Series: HC05r

Specifications of MC68HC705P6ACDW

• Core Processor: HC05
• Core Size: 8-Bit
• Speed: 2.1MHz
• Connectivity: SIO
• Peripherals: POR, WDT
• Number Of I /o: 21
• Program Memory Size: 4.5KB (4.5K x 8)
• Program Memory Type: OTP
• Ram Size: 176 x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 5.5 V
• Data Converters: A/D 4x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 28-SOIC (7.5mm Width)
• Data Bus Width: 8 bit
• Data Ram Size: 176 B
• Maximum Clock Frequency: 2.1 MHz
• Number Of Programmable I/os: 37
• Number Of Timers: 16 bit
• Operating Supply Voltage: 3.3 V to 5 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 8 bit
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: No RoHS Version Available

Chapter 12
Central Processor Unit (CPU) Core
12.1 Introduction
The MC68HC705P6A has an 8-K memory map. Therefore, it uses only the lower 13 bits of the address
bus. In the following discussion, the upper three bits of the address bus can be ignored. Also, the STOP
instruction can be modified to place the MCU in either the normal stop mode or the halt mode by means
of a MOR bit. All other instructions and registers behave as described in this section.
12.2 Registers
The MCU contains five registers which are hard-wired within the CPU and are not part of the memory
map. These five registers are shown in
12.2.1 Accumulator
The accumulator is a general-purpose 8-bit register as shown in
accumulator to hold operands and results of arithmetic calculations or non-arithmetic operations. The
accumulator is unaffected by a reset of the device.
Freescale Semiconductor
15
0
14
0
13
0
CONDITION CODE REGISTER
MC68HC705P6A Advance Information Data Sheet, Rev. 2.1
12
Figure 12-1. MC68HC05 Programming Model
0
11
0
10
0
Figure 12-1
HALF-CARRY BIT (FROM BIT 3)
9
0
PROGRAM COUNTER
8
0
INTERRUPT MASK
7
1
1
NEGATIVE BIT
and are described in the following paragraphs.
CARRY BIT
ZERO BIT
6
1
1
5
1
INDEX REGISTER
ACCUMULATOR
H
4
Figure
STACK POINTER
3
I
12-1. The CPU uses the
N
2
1
Z
C
0
CC
SP
PC
A
X
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