MC68HC908JL8CDW Freescale Semiconductor, MC68HC908JL8CDW Datasheet - Page 110
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MC68HC908JL8CDW
Manufacturer Part Number
MC68HC908JL8CDW
Description
IC MCU 8K FLASH 8MHZ 28-SOIC
Manufacturer
Freescale Semiconductor
Series
HC08r
Datasheet
1.MC908JL8CDWER.pdf
(212 pages)
Specifications of MC68HC908JL8CDW
Core Processor
HC08
Core Size
8-Bit
Speed
8MHz
Connectivity
SCI
Peripherals
LED, LVD, POR, PWM
Number Of I /o
23
Program Memory Size
8KB (8K x 8)
Program Memory Type
FLASH
Ram Size
256 x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 13x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
28-SOIC (7.5mm Width)
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Available stocks
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Manufacturer
Quantity
Price
Part Number:
MC68HC908JL8CDW
Manufacturer:
MOTOROLA/摩托罗拉
Quantity:
20 000
Part Number:
MC68HC908JL8CDWE
Manufacturer:
FREESCALE
Quantity:
20 000
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Timer Interface Module (TIM)
to clear the channel pin on output compare if the state of the PWM pulse is logic 1. Program the TIM to
set the pin if the state of the PWM pulse is logic 0.
The value in the TIM counter modulo registers and the selected prescaler output determines the
frequency of the PWM output. The frequency of an 8-bit PWM signal is variable in 256 increments. Writing
$00FF (255) to the TIM counter modulo registers produces a PWM period of 256 times the internal bus
clock period if the prescaler select value is $000. See
The value in the TIM channel registers determines the pulse width of the PWM output. The pulse width of
an 8-bit PWM signal is variable in 256 increments. Writing $0080 (128) to the TIM channel registers
produces a duty cycle of 128/256 or 50%.
8.4.4.1 Unbuffered PWM Signal Generation
Any output compare channel can generate unbuffered PWM pulses as described in
Modulation
pulse width value over the old value currently in the TIM channel registers.
An unsynchronized write to the TIM channel registers to change a pulse width value could cause incorrect
operation for up to two PWM periods. For example, writing a new value before the counter reaches the
old value but after the counter reaches the new value prevents any compare during that PWM period.
Also, using a TIM overflow interrupt routine to write a new, smaller pulse width value may cause the
compare to be missed. The TIM may pass the new value before it is written.
Use the following methods to synchronize unbuffered changes in the PWM pulse width on channel x:
110
•
•
When changing to a shorter pulse width, enable channel x output compare interrupts and write the
new value in the output compare interrupt routine. The output compare interrupt occurs at the end
of the current pulse. The interrupt routine has until the end of the PWM period to write the new
value.
When changing to a longer pulse width, enable TIM overflow interrupts and write the new value in
the TIM overflow interrupt routine. The TIM overflow interrupt occurs at the end of the current PWM
period. Writing a larger value in an output compare interrupt routine (at the end of the current pulse)
could cause two output compares to occur in the same PWM period.
(PWM). The pulses are unbuffered because changing the pulse width requires writing the new
TCHx
MC68HC908JL8/JK8 • MC68HC08JL8/JK8 • MC68HC908KL8 Data Sheet, Rev. 3.1
OVERFLOW
PULSE
WIDTH
Figure 8-3. PWM Period and Pulse Width
PERIOD
COMPARE
OUTPUT
OVERFLOW
8.9.1 TIM Status and Control
COMPARE
OUTPUT
OVERFLOW
COMPARE
OUTPUT
Freescale Semiconductor
Register.
8.4.4 Pulse Width
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