MC68HC908JL8CDW Freescale Semiconductor, MC68HC908JL8CDW Datasheet - Page 114
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MC68HC908JL8CDW
Manufacturer Part Number
MC68HC908JL8CDW
Description
IC MCU 8K FLASH 8MHZ 28-SOIC
Manufacturer
Freescale Semiconductor
Series
HC08r
Datasheet
1.MC908JL8CDWER.pdf
(212 pages)
Specifications of MC68HC908JL8CDW
Core Processor
HC08
Core Size
8-Bit
Speed
8MHz
Connectivity
SCI
Peripherals
LED, LVD, POR, PWM
Number Of I /o
23
Program Memory Size
8KB (8K x 8)
Program Memory Type
FLASH
Ram Size
256 x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 13x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
28-SOIC (7.5mm Width)
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Part Number:
MC68HC908JL8CDW
Manufacturer:
MOTOROLA/摩托罗拉
Quantity:
20 000
Part Number:
MC68HC908JL8CDWE
Manufacturer:
FREESCALE
Quantity:
20 000
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Timer Interface Module (TIM)
8.9 I/O Registers
These I/O registers control and monitor operation of the TIM:
8.9.1 TIM Status and Control Register
The TIM status and control register (TSC):
TOF — TIM Overflow Flag Bit
TOIE — TIM Overflow Interrupt Enable Bit
114
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This read/write flag is set when the TIM counter reaches the modulo value programmed in the TIM
counter modulo registers. Clear TOF by reading the TIM status and control register when TOF is set
and then writing a logic 0 to TOF. If another TIM overflow occurs before the clearing sequence is
complete, then writing logic 0 to TOF has no effect. Therefore, a TOF interrupt request cannot be lost
due to inadvertent clearing of TOF. Reset clears the TOF bit. Writing a logic 1 to TOF has no effect.
This read/write bit enables TIM overflow interrupts when the TOF bit becomes set. Reset clears the
TOIE bit.
1 = TIM counter has reached modulo value
0 = TIM counter has not reached modulo value
1 = TIM overflow interrupts enabled
0 = TIM overflow interrupts disabled
TIM status and control register (TSC)
TIM counter registers (TCNTH:TCNTL)
TIM counter modulo registers (TMODH:TMODL)
TIM channel status and control registers (TSC0, TSC1)
TIM channel registers (TCH0H:TCH0L, TCH1H:TCH1L)
Enables TIM overflow interrupts
Flags TIM overflows
Stops the TIM counter
Resets the TIM counter
Prescales the TIM counter clock
Address: T1SC, $0020 and T2SC, $0030
References to either timer 1 or timer 2 may be made in the following text by
omitting the timer number. For example, TSC may generically refer to both
T1SC AND T2SC.
Reset:
Read:
Write:
MC68HC908JL8/JK8 • MC68HC08JL8/JK8 • MC68HC908KL8 Data Sheet, Rev. 3.1
Bit 7
TOF
0
0
Figure 8-4. TIM Status and Control Register (TSC)
= Unimplemented
TOIE
6
0
TSTOP
5
1
NOTE
TRST
4
0
0
3
0
0
PS2
2
0
PS1
1
0
Freescale Semiconductor
Bit 0
PS0
0
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