MC68HC908GZ8VFA Freescale Semiconductor, MC68HC908GZ8VFA Datasheet - Page 140

• Manufacturer Part Number: MC68HC908GZ8VFA
• Description: IC MCU 8K FLASH 8MHZ CAN 48-LQFP
• Manufacturer: Freescale Semiconductor
• Series: HC08r

Specifications of MC68HC908GZ8VFA

• Core Processor: HC08
• Core Size: 8-Bit
• Speed: 8MHz
• Connectivity: CAN, LIN, SCI, SPI
• Peripherals: LVD, POR, PWM
• Number Of I /o: 37
• Program Memory Size: 8KB (8K x 8)
• Program Memory Type: FLASH
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 105°C
• Package / Case: 48-LQFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -

MSCAN08 Controller (MSCAN08)
12.12.3 Data Length Register (DLR)
This register keeps the data length field of the CAN frame.
DLC3–DLC0 — Data Length Code Bits
12.12.4 Data Segment Registers (DSRn)
The eight data segment registers contain the data to be transmitted or received. The number of bytes to
be transmitted or being received is determined by the data length code in the corresponding DLR.
12.12.5 Transmit Buffer Priority Registers
PRIO7–PRIO0 — Local Priority
140
The data length code contains the number of bytes (data byte count) of the respective message. At
transmission of a remote frame, the data length code is transmitted as programmed while the number
of transmitted bytes is always 0. The data byte count ranges from 0 to 8 for a data frame.
shows the effect of setting the DLC bits.
This field defines the local priority of the associated message buffer. The local priority is used for the
internal prioritization process of the MSCAN08 and is defined to be highest for the smallest binary
number. The MSCAN08 implements the following internal prioritization mechanism:
•
•
•
All transmission buffers with a cleared TXE flag participate in the prioritization right before the SOF
is sent.
The transmission buffer with the lowest local priority field wins the prioritization.
In case more than one buffer has the same lowest priority, the message buffer with the lower index
number wins.
Address:
Reset:
Read:
Write:
Figure 12-14. Transmit Buffer Priority Register (TBPR)
$05bD
PRIO7
Bit 7
MC68HC908GZ16 • MC68HC908GZ8 Data Sheet, Rev. 4
DLC3
0
0
0
0
0
0
0
0
1
PRIO6
6
Table 12-5. Data Length Codes
Data Length Code
DLC2
0
0
0
0
1
1
1
1
0
PRIO5
5
DLC1
0
0
1
1
0
0
1
1
0
PRIO4
Unaffected by reset
4
DLC0
0
1
0
1
0
1
0
1
0
PRIO3
3
Data Byte
Count
PRIO2
0
1
2
3
4
5
6
7
8
2
PRIO1
1
Freescale Semiconductor
PRIO0
Bit 0
Table 12-5