C8051F330 Silicon Laboratories Inc, C8051F330 Datasheet - Page 55

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C8051F330

Manufacturer Part Number
C8051F330
Description
IC 8051 MCU 8K FLASH 20MLP
Manufacturer
Silicon Laboratories Inc
Series
C8051F33xr
Datasheet

Specifications of C8051F330

Core Processor
8051
Core Size
8-Bit
Speed
25MHz
Connectivity
SMBus (2-Wire/I²C), SPI, UART/USART
Peripherals
POR, PWM, Temp Sensor, WDT
Number Of I /o
17
Program Memory Size
8KB (8K x 8)
Program Memory Type
FLASH
Ram Size
768 x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 3.6 V
Data Converters
A/D 16x10b; D/A 1x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
20-QFN
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-

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7.
The Voltage reference MUX on C8051F330/1, C8051F330D devices is configurable to use an externally
connected voltage reference, the internal reference voltage generator, or the
(see Figure 7.1). The REFSL bit in the Reference Control register (REF0CN) selects the reference source.
For an external source or the internal reference, REFSL should be set to ‘0’. To use
source, REFSL should be set to ‘1’.
The BIASE bit enables the internal voltage bias generator, which is used by the ADC, Temperature Sensor,
internal oscillators, and Current DAC. This bias is enabled when any of the aforementioned peripherals are
enabled. The bias generator may be enabled manually by writing a ‘1’ to the BIASE bit in register
REF0CN; see Figure 7.2 for REF0CN register details. The electrical specifications for the voltage refer-
ence circuit are given in Table 7.1.
The internal voltage reference circuit consists of a 1.2 V, temperature stable bandgap voltage reference
generator and a gain-of-two output buffer amplifier. The internal voltage reference can be driven out on the
VREF pin by setting the REFBE bit in register REF0CN to a ‘1’ (see Figure 7.2). The maximum load seen
by the VREF pin must be less than 200 µA to GND. When using the internal voltage reference, bypass
capacitors of 0.1 µF and 4.7 µF are recommended from the VREF pin to GND. If the internal reference is
not used, the REFBE bit should be cleared to ‘0’. Electrical specifications for the internal voltage reference
are given in Table 7.1.
Important Note About the VREF Pin: Port pin P0.0 is used as the external VREF input and as an output
for the internal VREF. When using either an external voltage reference or the internal reference circuitry,
P0.0 should be configured as an analog pin, and skipped by the Digital Crossbar. To configure P0.0 as an
analog pin, set to ‘0’ Bit0 in register P0MDIN. To configure the Crossbar to skip P0.0, set Bit 0 in register
P0SKIP to ‘1’. Refer to
details. The TEMPE bit in register REF0CN enables/disables the temperature sensor. While disabled, the
temperature sensor defaults to a high impedance state and any ADC0 measurements performed on the
sensor result in meaningless data.
Voltage Reference (C8051F330 and C8051F330D only)
VDD
GND
Recommended Bypass
4.7µF
R1
Capacitors
+
Figure 7.1. Voltage Reference Functional Block Diagram
Section “14. Port Input/Output” on page 113
Reference
External
Voltage
Circuit
0.1µF
VREF
VDD
REF0CN
C8051F330/1, C8051F330D
Rev. 1.2
0
1
IOSCE
N
Reference
REFBE
Internal
EN
EN
EN
Bias Generator
Temp Sensor
for complete Port I/O configuration
V
DD power supply voltage
To Analog Mux
(to ADC)
VREF
To ADC, IDAC,
Internal Oscillators
V
DD as the reference
55

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