C8051F061 Silicon Laboratories Inc, C8051F061 Datasheet - Page 144
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C8051F061
Manufacturer Part Number
C8051F061
Description
IC 8051 MCU 64K FLASH 64TQFP
Manufacturer
Silicon Laboratories Inc
Series
C8051F06xr
Specifications of C8051F061
Core Processor
8051
Core Size
8-Bit
Speed
25MHz
Connectivity
CAN, SMBus (2-Wire/I²C), SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, Temp Sensor, WDT
Number Of I /o
24
Program Memory Size
64KB (64K x 8)
Program Memory Type
FLASH
Ram Size
4.25K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 3.6 V
Data Converters
A/D 2x16b, 8x10b; D/A 2x12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
64-TQFP, 64-VQFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
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C8051F060/1/2/3/4/5/6/7
144
SFRs are listed in alphabetical order. All undefined SFR locations are reserved.
Register
CPT2MD
DAC0CN
DAC0H
DAC0L
DAC1CN
DAC1H
DAC1L
DMA0BND
DMA0CF
DMA0CN
DMA0CSH
DMA0CSL
DMA0CTH
DMA0CTL
DMA0DAH
DMA0DAL
DMA0DSH
DMA0DSL
DMA0IDT
DMA0IPT
DMA0ISW
DPH
DPL
EIE1
EIE2
EIP1
EIP2
EMI0CF
EMI0CN
EMI0TC
FLACL
FLSCL
IE
IP
OSCICL
OSCICN
OSCXCN
P0
P0MDOUT
P1
P1MDIN
P1MDOUT
P2
Address
0xFD
0xFC
0xDA
0xDC
0xDB
0xDE
0xDD
0xAD
0xD4
0xD3
0xD2
0xD4
0xD3
0xD2
0xD8
0xFB
0xFA
0xD9
0xFE
0xE6
0xE7
0xA3
0xA2
0xA1
0xB7
0xB7
0xA8
0xB8
0x8B
0x8A
0x8C
0xA4
0xA5
0xA0
0x89
0xF8
0xF9
0x83
0x82
0xF6
0xF7
0x80
0x90
Table 13.3. Special Function Registers (Continued)
SFR Page Description
All Pages Data Pointer High
All Pages Data Pointer Low
All Pages Extended Interrupt Enable 1
All Pages Extended Interrupt Enable 2
All Pages Extended Interrupt Priority 1
All Pages Extended Interrupt Priority 2
All Pages Interrupt Enable
All Pages Interrupt Priority
All Pages Port 0 Latch
All Pages Port 1 Latch
All Pages Port 2 Latch
F
F
F
F
F
F
F
3
0
0
0
1
1
1
3
3
3
3
3
3
3
3
3
3
3
3
3
3
0
0
0
0
Comparator 2 Configuration
DAC0 Control
DAC0 High
DAC0 Low
DAC1 Control
DAC1 High
DAC1 Low
DMA0 Instruction Boundary
DMA0 Configuration
DMA0 Control
DMA0 Repeat Counter Status High Byte
DMA0 Repeat Counter Status Low Byte
DMA0 Repeat Counter Limit High Byte
DMA0 Repeat Counter Limit Low Byte
DMA0 Data Address Beginning High Byte
DMA0 Data Address Beginning Low Byte
DMA0 Data Address Pointer High Byte
DMA0 Data Address Pointer Low Byte
DMA0 Instruction Write Data
DMA0 Instruction Write Address
DMA0 Instruction Status
EMIF Configuration
EMIF Control
EMIF Timing Control
Flash Access Limit
Flash Scale
Internal Oscillator Calibration
Internal Oscillator Control
External Oscillator Control
Port 0 Output Mode Configuration
Port 1 Input Mode
Port 1 Output Mode Configuration
Rev. 1.2
page 106
page 105
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page 108
page 107
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page 189
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page 194
Page No.
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page 154
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page 155
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