M30803FGFP#D3 Renesas Electronics America, M30803FGFP#D3 Datasheet - Page 294
M30803FGFP#D3
Manufacturer Part Number
M30803FGFP#D3
Description
IC M16C MCU FLASH 256K 100LQFP
Manufacturer
Renesas Electronics America
Series
M16C™ M16C/80r
Datasheet
1.M30803FGGPU3.pdf
(360 pages)
Specifications of M30803FGFP#D3
Core Processor
M16C/80
Core Size
16-Bit
Speed
20MHz
Connectivity
SIO, UART/USART
Peripherals
DMA, PWM, WDT
Number Of I /o
85
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
20K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 10x10b, D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
100-LQFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
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M
R
R
e
E
1
v
J
6
Figure 30.4 Page program flowchart
1 .
0
C
9
0 .
8 /
B
0
0
Page Program Command (41
0
1
A
Page program allows for high-speed programming in units of 256 bytes. Page program operation
starts when the command code “41
the 129th bus cycle, the write data is sequentially written 16 bits at a time. At this time, the addresses
A
it starts an auto write operation (data program and verify operation).
Whether the auto write operation is completed can be confirmed by reading the status register or the
flash memory control register 0. At the same time the auto write operation starts, the read status
register mode is automatically entered, so the content of the status register can be read out. The
status register bit 7 (SR7) is set to 0 at the same time the auto write operation starts and is returned to
1 upon completion of the auto write operation. In this case, the read status register mode remains
active until the Read Array command (FF
flash memory is reset using its reset bit.
The RY/BY status flag of the flash memory control register 0 is 0 during auto write operation and 1
when the auto write operation is completed as is the status register bit 7.
After the auto write operation is completed, the status register can be read out to know the result of the
auto write operation. For details, refer to the section where the status register is detailed.
Figure 30.4 shows an example of a page program flowchart.
Each block of the flash memory can be write protected by using a lock bit. For details, refer to the
section where the data protect function is detailed.
Additional writes to the already programmed pages are prohibited.
G
8
u
7
0
o r
. g
0 -
-A
u
1
0
7
p
0
, 2
need to be incremented by 2 from “00
0
2
____
0
0
5
Page 281
f o
3
2
9
16
)
Write address n and
RY/BY status flag
Check full status
16
Page program
Write 41
completed
” is written in the first bus cycle. In the second bus cycle through
n = FE
data n
Start
n = 0
= 1?
16
YES
YES
) or Read Lock Bit Status command (71
16
16
16
” to “FE
NO
NO
16
.” When the system finishes loading the data,
n = n + 2
30. CPU Rewrite Mode
16
) is written or the
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