MC9S12UF32PB Freescale Semiconductor, MC9S12UF32PB Datasheet - Page 63

• Manufacturer Part Number: MC9S12UF32PB
• Description: IC MCU 32K FLASH 30MHZ 64LQFP
• Manufacturer: Freescale Semiconductor
• Series: HCS12r

Specifications of MC9S12UF32PB

• Core Processor: HCS12
• Core Size: 16-Bit
• Speed: 30MHz
• Connectivity: ATA, Compact Flash, EBI/EMI, Memory Stick, MMC, SCI, SD, Smart Media, USB
• Peripherals: POR, WDT
• Number Of I /o: 41
• Program Memory Size: 32KB (32K x 8)
• Program Memory Type: FLASH
• Ram Size: 3.5K x 8
• Voltage - Supply (vcc/vdd): 2.25 V ~ 5.5 V
• Oscillator Type: Internal
• Operating Temperature: 0°C ~ 70°C
• Package / Case: 64-LQFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Data Converters: -

System on a Chip Guide — 9S12UF32DGV1/D V01.05
2.4.37 PP1 / SCD / ACFD9 / AATAD9— Port P I/O Pin 1
PP1 are general purpose input or output pin. When enabled in the SMHC module, the PP1 pin becomes
the card detect pin, SCD. When the SMHC is not enabled, it can be configured in the PIM module to
become the alternate data pins for CFHC or ATA5HC in place of PA1. While in reset and immediately out
of reset PP1 pin is configured as a high impedance input pin. Consult the Port Integration Module (PIM)
PIM_9UF32 Block Guide, the CFHC Block Guide, the ATA5HC Block Guide and the MSHC Block
Guide for information about pin configurations.
2.4.38 PP0 / SBSY / ACFD8 / AATAD8— Port P I/O Pin 0
PP0 are general purpose input or output pin. When enabled in the SMHC module, the PP0 pin becomes
the busy pin, SBSY. When the SMHC is not enabled, it can be configured in the PIM module to become
the alternate data pins for CFHC or ATA5HC in place of PA0. While in reset and immediately out of reset
PP0 pin is configured as a high impedance input pin. Consult the Port Integration Module (PIM)
PIM_9UF32 Block Guide, the CFHC Block Guide, the ATA5HC Block Guide and the MSHC Block
Guide for information about pin configurations.
2.4.39 PQ[7:0] / SDAT[7:0] / ACFD[7:0] / AATAD[7:0]— Port Q I/O Pins [7:0]
PQ[7:0] are general purpose input or output pins. When enabled in the SMHC module, the PQ[7:0] pins
become the Smartmedia Data pins, SDAT[7:0]. When the SMHC is not enabled, it can be configured in
the PIM module to become the alternate data pins for CFHC or ATA5HC in place of PB[7:0]. While in
reset and immediately out of reset PQ[7:0] pins are configured as high impedance input pins. Consult the
Port Integration Module (PIM) PIM_9UF32 Block Guide, the CFHC Block Guide, the ATA5HC Block
Guide and the MSHC Block Guide for information about pin configurations.
2.4.40 PR[1:0] / CFA[4:3] — Port R I/O Pins [1:0]
PR[1:0] are general purpose input or output pins. When enabled in the CFHC module, the PR[1:0] pins
become the Compact Flash address pins, CFA[4:3]. Individual port pins can be configured as either CF
address or general purpose I/O pins in CFHC module. While in reset and immediately out of reset PR[1:0]
pins are configured as high impedance input pins. Consult the Port Integration Module (PIM) PIM_9UF32
Block Guide and the CFHC Block Guide for information about pin configurations.
2.4.41 PR[2] / CFA[5] / RXD — Port R I/O Pins [2]
PR[2] is general purpose input or output pin. When enabled in the CFHC module, the PR[2] pin becomes
the Compact Flash address pin, CFA[5]. This port pin can be configured as either CF address or general
purpose I/O pin in CFHC module. When the CFHC module is not enabled or this pin is released, it can
also be configured as the RXD pin when the SCI module is enabled. While in reset and immediately out
of reset PR[2] pin is configured as high impedance input pin. Consult the Serial Communication Interface
(SCI), the Port Integration Module (PIM) PIM_9UF32 Block Guide and the CFHC Block Guide for
information about pin configurations.
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