M30260F6AGP#U3 Renesas Electronics America, M30260F6AGP#U3 Datasheet - Page 12
![IC M16C MCU FLASH 48K 48LQFP](/photos/28/61/286102/48-lqfp__plqp0048kb-a_sml.jpg)
M30260F6AGP#U3
Manufacturer Part Number
M30260F6AGP#U3
Description
IC M16C MCU FLASH 48K 48LQFP
Manufacturer
Renesas Electronics America
Series
M16C™ M16C/Tiny/26r
Specifications of M30260F6AGP#U3
Core Processor
M16C/60
Core Size
16-Bit
Speed
20MHz
Connectivity
I²C, IEBus, SIO, UART/USART
Peripherals
DMA, PWM, Voltage Detect, WDT
Number Of I /o
39
Program Memory Size
48KB (48K x 8)
Program Memory Type
FLASH
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 12x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
48-LQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Part Number:
M30260F6AGP#U3M30260F6AGP#D3
Manufacturer:
Renesas Electronics America
Quantity:
10 000
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10. Watchdog Timer ______________________________ 80
11. DMAC ______________________________________ 82
12. Timer _______________________________________ 92
9.2 Interrupts and Interrupt Vector .................................................................................... 64
9.3 Interrupt Control .......................................................................................................... 66
9.4 Interrupt Sequence ...................................................................................................... 70
9.5 Interrupt Priority ........................................................................................................... 74
9.6 INT Interrupt ................................................................................................................ 76
9.7 NMI Interrupt ............................................................................................................... 77
9.8 Key Input Interrupt ....................................................................................................... 77
9.9 Address Match Interrupt .............................................................................................. 78
10.1 Count Source Protective Mode ................................................................................. 81
11.1 Transfer Cycles......................................................................................................... 87
11.2. DMA Transfer Cycles ................................................................................................ 89
11.3 DMA Enable............................................................................................................... 90
11.4 DMA Request ............................................................................................................ 90
11.5 Channel Priority and DMA Transfer Timing .............................................................. 91
12.1 Timer A ..................................................................................................................... 94
12.2 Timer B ................................................................................................................... 108
9.2.1 Fixed Vector Tables .............................................................................................. 64
9.2.2 Relocatable Vector Tables ................................................................................... 65
9.3.1 I Flag .................................................................................................................... 69
9.3.2 IR Bit .................................................................................................................... 69
9.3.3 ILVL2 to ILVL0 Bits and IPL ................................................................................. 69
9.4.1 Interrupt Response Time...................................................................................... 71
9.4.2 Variation of IPL when Interrupt Request is Accepted ........................................... 71
9.4.3 Saving Registers .................................................................................................. 72
9.4.4 Returning from an Interrupt Routine .................................................................... 74
9.5.1 Interrupt Priority Resolution Circuit ...................................................................... 74
12.1.1. Timer Mode ....................................................................................................... 97
12.1.2. Event Counter Mode ......................................................................................... 98
12.1.3. One-shot Timer Mode ..................................................................................... 103
12.1.4. Pulse Width Modulation (PWM) Mode ............................................................ 105
12.2.1 Timer Mode ..................................................................................................... 111
12.2.2 Event Counter Mode ........................................................................................ 112
12.2.3 Pulse Period and Pulse Width Measurement Mode ....................................... 113
12.2.4 A/D Trigger Mode ............................................................................................ 115
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A-3
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