M30260F6AGP#U3 Renesas Electronics America, M30260F6AGP#U3 Datasheet - Page 163
![IC M16C MCU FLASH 48K 48LQFP](/photos/28/61/286102/48-lqfp__plqp0048kb-a_sml.jpg)
M30260F6AGP#U3
Manufacturer Part Number
M30260F6AGP#U3
Description
IC M16C MCU FLASH 48K 48LQFP
Manufacturer
Renesas Electronics America
Series
M16C™ M16C/Tiny/26r
Specifications of M30260F6AGP#U3
Core Processor
M16C/60
Core Size
16-Bit
Speed
20MHz
Connectivity
I²C, IEBus, SIO, UART/USART
Peripherals
DMA, PWM, Voltage Detect, WDT
Number Of I /o
39
Program Memory Size
48KB (48K x 8)
Program Memory Type
FLASH
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 12x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
48-LQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Part Number:
M30260F6AGP#U3M30260F6AGP#D3
Manufacturer:
Renesas Electronics America
Quantity:
10 000
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Table 13.1.1.3. Pin Functions
NOTE:
6
Table 13.1.1.4. P6
NOTES:
0
TxDi (i = 0 to 2)
(P6
RxDi
(P6
CLKi
(P6
CTSi/RTSi
(P6
2
9
C
0 .
1. When the U1MAP bit in PACR register is “1” (P7
B
Pin name
Table 13.1.1.3 lists the functions of the input/output pins during clock synchronous serial I/O mode. Table
13.3 shows pin functions for the case where the multiple transfer clock output pin select function is dese-
lected. Table 13.1.1.4 lists the P6
Note that for a period from when the UARTi operation mode is selected to when transfer starts, the TxDi
pin outputs an “H”. (If the N-channel open-drain output is selected, this pin is in a high-impedance state.)
Pin function
P6
CTS
RTS
CTS
CLKS
1. When the U1MAP bit in PACR register is “1” (P7
2. In addition to this, set the CRD bit in the U0C0 register to “0” (CT0
3. When the CLKMD1 bit is set to "1" and the CLKMD0 bit is set to "0", the following logiclevels are output:
2 /
0
3
2
1
0
0
, P6
, P6
, P6
, P6
• High if the CLKPOL bit in the U1C0 register is set to "0"
• Low if the CLKPOL bit in the U1C0 register is set to "1"
2
6
U0C0 register to “1” (RTS
4
0
A
F
1
1
0
2
e
(2)
7
6
5
4
1
0 -
G
b
, P7
, P7
, P7
, P7
1 .
2
o r
0
, 5
u
0
1
2
3
0
)
)
)
)
p
2
0
Serial data output
Serial data input
Transfer clock output
Transfer clock input
CTS input
RTS output
I/O port
(
M
0
7
CRD
U1C0 register
1
1
0
0
0
6
4
C
page 144
Pin Functions
Function
2 /
6
, A
CRS
0
1
0
0
M
selected).
f o
1
6
(1)
3
C
2
2 /
RCSP
9
(When Not Select Multiple Transfer Clock Output Pin Function)
6
0
0
0
1
4
(1)
Bit set value
, B
pin functions during clock synchronous serial I/O mode.
(Outputs dummy data when performing reception only)
Set the PD6_2 bit and PD6_6 bit in the PD6 register, and PD7_1 bit in the PD7
register to "0"(Can be used as an input port when performing transmission only)
Set the CKDIR bit in the UiMR register to "0"
Set the CRD bit in the UiC0 register to "0"
Set the CRS bit in the UiC0 register to "0"
Set the PD6_0 bit and PD6_4 bit in the PD6 register’ is set to "0", the PD7_3
bit in the PD7 register to "0"
Set the CKDIR bit in the UiMR register to "1"
Set the PD6_1 bit and PD6_5 bit in the PD6 register, and the PD7_2 bit in the
PD7 register to "0"
Set the CRD bit in the UiC0 register to "0"
Set the CRS bit in the UiC0 register to "1"
Set the CRD bit in the UiC0 register to "1"
M
UCON register
1
CLKMD1
6
C
3
1
to P7
0
0
0
0
2 /
3
(3)
to P7
6
) T
0
), UART1 pin is assgined to P7
0
), this table lists the P7
CLKMD0
1
0
/RT0
Method of selection
Input: 0, Output: 1
0
0
0
enabled) and the CRS bit in the
PD6 register
PD6_4
0
functions.
3
to P7
0
.
13. Serial I/O
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