EE80C196MC Intel, EE80C196MC Datasheet - Page 8

• Manufacturer Part Number: EE80C196MC
• Description: IC MPU 16-BIT 5V 16MHZ 84-PLCC
• Manufacturer: Intel
• Series: 80Cr

Specifications of EE80C196MC

• Core Processor: MCS 96
• Core Size: 16-Bit
• Speed: 16MHz
• Peripherals: PWM, WDT
• Number Of I /o: 53
• Program Memory Type: ROMless
• Ram Size: 256 x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 13x10b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 84-PLCC
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -
• Connectivity: -
• Other names: 863951

8XC196MC
PIN DESCRIPTIONS
8
PORT6
PWM0 PWM1
(P6 6 P6 7)
RD (P5 3)
READY (P5 6)
RESET
T1CLK
(P1 2)
T1DIR
(P1 3)
V
WG1–WG3 WG1 – WG3
(P6 0–P6 5)
WR WRL (P5 2)
XTAL1
XTAL2
PMODE
(P0 4–7)
PACT
(P2 5)
PALE
(P2 1)
PROG
(P2 2)
PVER
(P2 0)
CPVER
(P2 6)
AINC
(P2 4)
PP
Symbol
(Alphabetically Ordered) (Continued)
8-bit output port P6 6 and P6 7 output PWM the others are used as the Wave
Form Generator outputs Can be used as standard output ports
Programmable duty cycle Programmable frequency Pulse Width Modulator
pins The duty cycle has a resolution of 256 steps and the frequency can vary
from 122 Hz to 31 KHz (16 MHz input clock) Pins may be configured as
standard output if PWM is not used
Read signal output to external memory RD is low only during external memory
reads Can be used as standard I O when not used as RD
Ready input to lengthen external memory cycles If READY
controller inserts wait states until the next positive transition of CLKOUT
occurs with READY
READY
Reset input to and open-drain output from the chip Held low for at least 16
state times to reset the chip Input high for normal operation RESET has an
Ohmic internal pullup resistor
Timer 0 Clock input This pin has two other alternate functions ACH10 and
P1 2
Timer 0 Direction input This pin has two other alternate functions ACH11 and
P1 3
The programming voltage is applied to this pin It is also the timing pin for the
return from Power Down circuit Connect this pin with a 1 F capacitor to V
and a 1 M
the pin to V
3 phase output signals and their complements used in motor control
applications The pins can also be configured as standard output pins
Write and Write Low output to external memory WR will go low every external
write WRL will go low only for external writes to an even byte Can be used as
standard I O when not used as WR WRL
Input of the oscillator inverter and the internal clock generator This pin should
be used when using an external clock source
Output of the oscillator inverter
Determines the EPROM programming mode
A low signal in Auto Programming mode indicates that programming is in
process A high signal indicates programming is complete
A falling edge in Slave Programming Mode and Auto Configuration Byte
Programming Mode indicates that ports 3 and 4 contain valid programming
address command information (input to slave)
A falling edge in Slave Programming Mode begins programming A rising edge
ends programming
A high signal in Slave Programming Mode and Auto Configuration Byte
Programming Mode indicates the byte programmed correctly
Cumulative Program Verification Pin is high if all locations since entering a
programming mode have programmed correctly
Auto Increment Active low input enables the auto increment mode Auto
increment will allow reading or writing of sequential EPROM locations without
address transactions across the PBUS for each read or write
CC
resistor to V
e
1 Can be used as standard I O when not used as
CC
If the Power Down feature is not used connect
Function
e
0 the memory
SS