M30280F6HP#D3 Renesas Electronics America, M30280F6HP#D3 Datasheet - Page 248

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M30280F6HP#D3

Manufacturer Part Number
M30280F6HP#D3
Description
MCU 3/5V 48K I-TEMP 80-LQFP
Manufacturer
Renesas Electronics America
Series
M16C™ M16C/Tiny/28r
Datasheet

Specifications of M30280F6HP#D3

Core Processor
M16C/60
Core Size
16-Bit
Speed
20MHz
Connectivity
I²C, IEBus, SIO, UART/USART
Peripherals
DMA, POR, PWM, Voltage Detect, WDT
Number Of I /o
71
Program Memory Size
48KB (48K x 8)
Program Memory Type
FLASH
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 24x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
80-LQFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-

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M
R
R
e
E
1
. v
Figure 15.9 ADCON0 to ADCON2 Registers in Repeat Mode
J
6
0
C
2
9
0 .
2 /
B
0
0
8
0
4
G
J
7
a
o r
0 -
. n
u
2
3
p
0
, 1
0
(
M
2
A/D Control Register 0
NOTES:
A/D Control Register 1
b7
b7
0
NOTES:
1
A/D Control Register 2
b7
0
6
1. If the ADCON0 register is rewritten during A/D conversion, the conversion result will be indeterminate.
2. AN0
3. After rewriting the MD1 to MD0 bits, set the CH2 to CH0 bits over again using an another instruction.
1. If the ADCON1 register is rewritten during A/D conversion, the conversion result will be indeterminate.
2. If the VCUT bit is reset from “0” (Vref unconnected) to “1” (Vref connected), wait for 1 s or more before starting
b6
b6
NOTES:
7
C
ADGSEL0 bits in the ADCON2 register to select the desired pin.
b6
A/D conversion.
1. If the ADCON2 register is rewritten during A/D conversion, the conversion result will be indeterminate.
b5
b5
1
2 /
b5
0
0
page 226
b4
0
b4
, 8
to AN0
b4
b3
1
b3
M
b3
0
b2
b2
0
7
1
and AN2
b2
6
b1
b1
C
b1
b0
b0
f o
2 /
b0
0
Bit Symbol
Bit Symbol
8
to AN2
3
(1)
(1)
(b7-b6)
SCAN0
SCAN1
) B
CKS1
VCUT
ADST
CKS0
8
BITS
Bit Symbol
CH1
CH2
MD0
MD1
TRG
CH0
MD2
Symbol
ADCON0
Symbol
ADCON1
ADGSEL0
ADGSEL1
5
(1)
CKS2
TRG1
(b7-b6)
SMP
(b3)
7
Symbol
ADCON2
can be used in the same way as AN
Analog Input Pin
Select Bit
A/D Operation Mode
Select Bit 0
Trigger Select Bit
A/D Conversion Start
Flag
Frequency Select Bit 0
A/D Sweep Pin
Select Bit
A/D Operation Mode
Select Bit 1
8/10-Bit Mode Select Bit
Frequency Select Bit 1
Vref connect bit
Nothing is assigned. When write, set to “0”.
When read, its content is “0”.
A/D Conversion Method
Select Bit
A/D Input Group Select
Bit
Reserved Bit
Frequency Select Bit 2
Trigger Select Bit 1
Nothing is assigned. When write, set to “0”.
When read, its content is “0”.
Bit Name
Bit Name
(2, 3)
(3)
Address
03D6
Address
Bit Name
03D7
(2)
16
Address
16
03D4
16
0 : 8-bit mode
1 : 10-bit mode
1 : Vref connected
Refer to Table 15.2
0 : Any mode other than repeat sweep
Refer to Table 15.2
0 0 0 : Select AN
0 0 1 : Select AN
0 1 0 : Select AN
0 1 1 : Select AN
1 0 0 : Select AN
1 0 1 : Select AN
1 1 0 : Select AN
1 1 1 : Select AN
b4 b3
0 1 : Repeat mode
0 : Software trigger
1 : Hardware trigger (AD
0 : A/D conversion disabled
1 : A/D conversion started
Invalid in repeat mode
b2 b1 b0
mode 1
0
Set to "0" in repeat mode
to AN
See Table 15.2
b2 b1
0 : Without sample and hold
1 : With sample and hold
0 0 : Select port P10 group
0 1 : Do not set
1 0 : Select port P0 group
1 1 : Select port P1/P9 group
Set to
After Reset
00000XXX
After Reset
00
7
16
. Use the ADGSEL1 to
“0”
After Reset
00
16
0
1
2
3
4
5
6
7
Function
Function
2
Function
TRG
trigger)
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
15. A/D Converter

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