M30280F6HP#D3 Renesas Electronics America, M30280F6HP#D3 Datasheet - Page 255

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M30280F6HP#D3

Manufacturer Part Number
M30280F6HP#D3
Description
MCU 3/5V 48K I-TEMP 80-LQFP
Manufacturer
Renesas Electronics America
Series
M16C™ M16C/Tiny/28r
Datasheet

Specifications of M30280F6HP#D3

Core Processor
M16C/60
Core Size
16-Bit
Speed
20MHz
Connectivity
I²C, IEBus, SIO, UART/USART
Peripherals
DMA, POR, PWM, Voltage Detect, WDT
Number Of I /o
71
Program Memory Size
48KB (48K x 8)
Program Memory Type
FLASH
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 24x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
80-LQFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-

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M
R
R
1
e
E
Table 15.8 Simultaneous Sample Sweep Mode Specifications
NOTES:
Figure 15.16 Operation Example in Simultaneous Sample Sweep Mode
. v
6
J
Function
A/D Conversion Start Condition
A/D Conversion Stop Condition
Interrupt Generation Timing A/D conversion completed
Analog Input Pin
Readout of A/D conversion result Readout one of the AN0 to AN7 registers that corresponds to the selected pin
0
C
15.1.6 Simultaneous Sample Sweep Mode
2
9
1. AN0
2 /
0 .
B
In simultaneous sample sweep mode, analog voltages applied to the selected pins are converted one-by-
one to a digital code. The input voltages of AN0 and AN1 are sampled simultaneously using two circuits
of sample and hold circuit. Table 15.8 shows the simultaneous sample sweep mode specifications. Fig-
ure 15.16 shows the operation example in simultaneous sample sweep mode. Figure 15.17 shows
ADCON0 to ADCON2 registers and Figure 15.18 shows ADTRGCON registers in simultaneous sample
sweep mode. Table 15.9 shows the trigger select bit setting in simultaneous sample sweep mode. In
simultaneous sample sweep mode, Timer B0 underflow can be selected as a trigger by combining soft-
ware trigger, AD
underflow or A/D trigger mode of Timer B.
0
8
0
need to belong to the same group.
0
G
4
J
7
a
o r
0 -
. n
0
Item
u
AN
AN
AN
AN
AN
AN
AN
AN
2
to AN0
p
3
•Example when selecting AN
0
, 1
0
1
2
3
4
5
6
7
0
(
M
2
A/D conversion started
1
0
___________
0
6
7
7
C
TRG
and AN2
2 /
page 233
, 8
trigger, Timer B2 underflow, Timer B2 interrupt generation frequency setting counter
M
1
6
0
The SCAN1 to SCAN0 bits in the ADCON1 register and ADGSEL1 to
ADGSEL0 bits in the ADCON2 register select pins. Analog voltage applied
to the selected pins is converted one-by-one to a digital code. At this time,
the input voltage of AN
When the TRG bit in the ADCON0 register is "0" (software trigger)
When the TRG bit in the ADCON0 register is "1" (hardware trigger)
The trigger is selected by TRG1 and HPTRG0 bits (See Table 15.9)
A/D conversion completed (If selecting software trigger, the ADST bit is
automatically set to "0" ).
Set the ADST bit to "0" (A/D conversion halted)
Select from AN
AN
C
Set the ADST bit in the ADCON0 register to “1” (A/D conversion started)
to AN2
The AD
bit to “1” (A/D conversion started)
Timer B0, B2 or Timer B2 interrupt generation frequency setting counter
underflow after setting the ADST bit to “1” (A/D conversion started)
2 /
f o
0
8
3
to AN
) B
8
5
0
7
to AN
TRG
can be used in the same way as AN
7
(8 pins)
pin input changes state from “H” to “L” after setting the ADST
3
to A/D pins for sweep (SCAN1 to SCAN0="01
0
to AN
(1)
1
0
(2 pins), AN
and AN
A/D interrupt request generated
Specification
1
are sampled simultaneously.
0
to AN
3
(4 pins),AN
0
to AN
A/D pin input voltage
sampling
A/D pin conversion
7
2
. However, all input pins
")
0
to AN
5
15. A/D Converter
(6 pins), or

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