MCHC908GR8VFAE Freescale Semiconductor, MCHC908GR8VFAE Datasheet - Page 154

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MCHC908GR8VFAE

Manufacturer Part Number
MCHC908GR8VFAE
Description
IC MCU 8K FLASH 8MHZ 32-LQFP
Manufacturer
Freescale Semiconductor
Series
HC08r
Datasheet

Specifications of MCHC908GR8VFAE

Core Processor
HC08
Core Size
8-Bit
Speed
8MHz
Connectivity
SCI, SPI
Peripherals
LVD, POR, PWM
Number Of I /o
21
Program Memory Size
7.5KB (7.5K x 8)
Program Memory Type
FLASH
Ram Size
384 x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 6x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 105°C
Package / Case
32-LQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
MCHC908GR8VFAE
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
Central Processing Unit (CPU)
10.9 Opcode Map
Technical Data
154
TST opr
TSTA
TSTX
TST opr,X
TST ,X
TST opr,SP
TSX
TXA
TXS
A Accumulatorn
C Carry/borrow bitopr
CCRCondition code registerPC
ddDirect address of operandPCH
dd rrDirect address of operand and relative offset of branch instructionPCL
DDDirect to direct addressing modeREL
DIRDirect addressing moderel
DIX+Direct to indexed with post increment addressing moderr
ee ffHigh and low bytes of offset in indexed, 16-bit offset addressingSP1
EXTExtended addressing modeSP2
ff Offset byte in indexed, 8-bit offset addressingSP
H Half-carry bitU
H Index register high byteV
hh llHigh and low bytes of operand address in extended addressingX
I Interrupt maskZ
ii Immediate operand byte&
IMDImmediate source to direct destination addressing mode|
IMMImmediate addressing mode
INHInherent addressing mode( )
IXIndexed, no offset addressing mode–( )
IX+Indexed, no offset, post increment addressing mode#
IX+DIndexed with post increment to direct addressing mode
IX1Indexed, 8-bit offset addressing mode
IX1+Indexed, 8-bit offset, post increment addressing mode?
IX2Indexed, 16-bit offset addressing mode:
MMemory location
N Negative bit—
Source
Form
Test for Negative or Zero
Transfer SP to H:X
Transfer X to A
Transfer H:X to SP
Operation
Table 10-1. Instruction Set Summary (Continued)
See
Freescale Semiconductor, Inc.
Table
For More Information On This Product,
10-2.
Central Processing Unit (CPU)
Go to: www.freescale.com
(A) – $00 or (X) – $00 or (M) – $00
«
(SP)
Description
H:X
A
(SP) + 1
(H:X) – 1
(X)
Any bit
Operand (one or two bytes)
Program counter
Program counter high byte
Program counter low byte
Relative addressing mode
Relative program counter offset byte
Relative program counter offset byte
Stack pointer, 8-bit offset addressing mode
Stack pointer 16-bit offset addressing mode
Stack pointer
Undefined
Overflow bit
Index register low byte
Zero bit
Logical AND
Logical OR
Logical EXCLUSIVE OR
Contents of
Negation (two’s complement)
Immediate value
Sign extend
Loaded with
If
Concatenated with
Set or cleared
Not affected
V H I N Z C
0 – –
– – – – – – INH
– – – – – – INH
– – – – – – INH
Effect on
CCR
MC68HC908GR8 — Rev 4.0
DIR
INH
INH
IX1
IX
SP1
9E6D
3D
4D
5D
6D
7D
MOTOROLA
95
9F
94
dd
ff
ff
3
1
1
3
2
4
2
1
2

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