BU7242SF-E2 Rohm Semiconductor, BU7242SF-E2 Datasheet - Page 27
![OP AMP I/O LV 1.8-5.5V 8-SOP](/photos/6/96/69672/8-sop_sop8_pkg_sml.jpg)
BU7242SF-E2
Manufacturer Part Number
BU7242SF-E2
Description
OP AMP I/O LV 1.8-5.5V 8-SOP
Manufacturer
Rohm Semiconductor
Datasheet
1.BU7461G-TR.pdf
(37 pages)
Specifications of BU7242SF-E2
Amplifier Type
General Purpose
Number Of Circuits
2
Output Type
Rail-to-Rail
Slew Rate
0.4 V/µs
Gain Bandwidth Product
900kHz
Current - Input Bias
1pA
Voltage - Input Offset
1000µV
Current - Supply
180µA
Current - Output / Channel
12mA
Voltage - Supply, Single/dual (±)
1.8 V ~ 5.5 V, ±0.9 V ~ 2.75 V
Operating Temperature
-40°C ~ 105°C
Mounting Type
Surface Mount
Package / Case
8-SOP
Number Of Channels
2
Common Mode Rejection Ratio (min)
45 dB
Input Offset Voltage
9 mV
Input Bias Current (max)
1 pA
Operating Supply Voltage
3 V, 5 V
Supply Current
0.36 mA
Maximum Operating Temperature
+ 105 C
Minimum Operating Temperature
- 40 C
Maximum Dual Supply Voltage
+/- 2.75 V
Minimum Dual Supply Voltage
+/- 0.9 V
Mounting Style
SMD/SMT
Shutdown
No
Supply Voltage (max)
5.5 V
Supply Voltage (min)
1.8 V
Technology
CMOS
Voltage Gain Db
95 dB
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
-3db Bandwidth
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
BU7242SF-E2TR
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
BU7242SF-E2
Manufacturer:
Rohm
Quantity:
4 975
BU7261/BU7261S family, BU7241/BU7241S family, BU7295/BU7295S family, BU7275/BU7275S family
BU7262/BU7262S family, BU7242/BU7242S family, BU7264/BU7264S family, BU7244/BU7244S family
●Test circuit 1 NULL method
© 2010 ROHM Co., Ltd. All rights reserved.
www.rohm.com
Input Offset Voltage
Large Signal Voltage Gain
Common-mode Rejection Ratio
(Input Common-mode Voltage Range)
Power Supply Rejection Ratio
-Calculation-
1. Input Offset Voltage (Vio)
2. Large Signal Voltage Gain (Av)
3. Common-mode Rejection Ratio (CMRR)
4. Power Supply Rejection Ratio (PSRR)
Parameter
Vicm
RS=50[ Ω ]
RS=50[ Ω ]
50[k Ω ]
0.015[µF]
Ri=1[M Ω ]
Ri=1[M Ω ]
SW2
SW1
0.015[µF]
Fig.185 Test circuit 1 (one channel only)
VF1
VF2
VF3
VF4
VF5
VF6
VF7
VF
VDD
VSS
DUT
CMRR
PSRR
Vio
Av
ON
ON
ON
ON
S1
=
=
VRL
SW3
20Log
RL
=
=
1+Rf/Rs
20Log
Vo
|VF1|
27/36
20Log
ON
ON
ON
ON
S2
Rf=50[k Ω ]
0.1[µF]
2×(1+Rf/Rs)
|VF2-VF3|
EK
3.7×(1+Rf/Rs)
1.8×(1+Rf/Rs)
1000[pF]
[V]
500[k Ω ]
|VF4-VF5|
|VF6-VF7|
OFF
OFF
OFF
ON
S3
500[k Ω ]
[dB]
VDD
1.8
5.5
3
3
3
[dB]
[dB]
LL
-15[V]
15[V]
VSS
0.01[µF]
0
0
0
0
VDD, VSS, EK, Vicm Unit: [V]
-1.5
-0.5
-2.5
-1.5
-0.9
EK
VF
Technical Note
2010.12 - Rev.A
Vicm
1.5
3
0
3
0
Calculation
1
2
3
4