OP249GSZ Analog Devices Inc, OP249GSZ Datasheet - Page 15

IC OPAMP JFET 4.7MHZ DUAL 8SOIC

OP249GSZ

Manufacturer Part Number
OP249GSZ
Description
IC OPAMP JFET 4.7MHZ DUAL 8SOIC
Manufacturer
Analog Devices Inc
Datasheet

Specifications of OP249GSZ

Slew Rate
22 V/µs
Amplifier Type
J-FET
Number Of Circuits
2
Gain Bandwidth Product
4.7MHz
Current - Input Bias
30pA
Voltage - Input Offset
200µV
Current - Supply
5.6mA
Current - Output / Channel
36mA
Voltage - Supply, Single/dual (±)
±4.5 V ~ 18 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
8-SOIC (3.9mm Width)
Op Amp Type
Precision
No. Of Amplifiers
2
Bandwidth
4.7MHz
Supply Voltage Range
± 4.5V To ± 18V
Amplifier Case Style
SOIC
No. Of Pins
8
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Output Type
-
-3db Bandwidth
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
OP249GSZ
Manufacturer:
ADI/亚德诺
Quantity:
20 000
Part Number:
OP249GSZ-REEL
Manufacturer:
VISHAY
Quantity:
9 200
DAC OUTPUT AMPLIFIER
Unity-gain stability, a low offset voltage of 300 μV typical, and a
fast settling time of 870 ns to 0.01%, makes the OP249 an ideal
amplifier for fast DACs.
For CMOS DAC applications, the low offset voltage of the OP249
results in excellent linearity performance. CMOS DACs, such as
the PM7545, typically have a code-dependent output resistance
variation between 11 kΩ and 33 kΩ. The change in output
resistance, in conjunction with the 11 kΩ feedback resistor, results
in a noise gain change, which causes variations in the offset
error, increasing linearity errors. The OP249 features low offset
voltage error, minimizing this effect and maintaining 12-bit
linearity performance over the full-scale range of the converter.
Figure 47. Fast Settling and Low Offset Error of the OP249 Enhances CMOS DAC Performance—Unipolar Operation
Figure 48. Fast Settling and Low Offset Error of the OP249 Enhances CMOS DAC Performance—Bipolar Operation
REFERENCE
OR V
IN
REFERENCE
500Ω
OR V
IN
19
DB
DATA INPUT
V
REF
500Ω
11
V
V
18
DD
DD
12
TO DB
0.1µF
PM7545
19
DB
DATA INPUT
0
V
REF
11
DGND
V
V
18
DD
DD
12
TO DB
R
3
20
AGND
FB
0.1µF
OUT
PM7545
Rev. G | Page 15 of 20
75Ω
1
0
DGND
1
2
R
20
FB
3
AGND
OUT
C
33pF
75Ω
2
3
1
OP249
1
2
+15V
1/2
Because the DAC output capacitance appears at the inputs of
the op amp, it is essential that the amplifier be adequately
compensated. Compensation increases the phase margin and
ensures an optimal overall settling response. The required lead
compensation is achieved with Capacitor C in Figure 48.
20kΩ
8
1%
R4
C
33pF
0.1µF
1
2
3
OP249
1/2
+15V
–15V
8
4
10kΩ
1%
R3
0.1µF
0.1µF
1
5
6
OP249
–15V
1/2
4
10kΩ
1%
R5
V
OUT
0.1µF
7
V
OUT
OP249

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