OP249GSZ Analog Devices Inc, OP249GSZ Datasheet - Page 16

• Manufacturer Part Number: OP249GSZ
• Description: IC OPAMP JFET 4.7MHZ DUAL 8SOIC
• Manufacturer: Analog Devices Inc

Specifications of OP249GSZ

• Slew Rate: 22 V/µs
• Amplifier Type: J-FET
• Number Of Circuits: 2
• Gain Bandwidth Product: 4.7MHz
• Current - Input Bias: 30pA
• Voltage - Input Offset: 200µV
• Current - Supply: 5.6mA
• Current - Output / Channel: 36mA
• Voltage - Supply, Single/dual (±): ±4.5 V ~ 18 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 8-SOIC (3.9mm Width)
• Op Amp Type: Precision
• No. Of Amplifiers: 2
• Bandwidth: 4.7MHz
• Supply Voltage Range: ± 4.5V To ± 18V
• Amplifier Case Style: SOIC
• No. Of Pins: 8
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Output Type: -
• -3db Bandwidth: -
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant

OP249
Figure 49 illustrates the effect of altering the compensation on
the output response of the circuit in Figure 47. Compensation is
required to address the combined effect of the output capacitance
of the DAC, the input capacitance of the op amp, and any stray
capacitance. Slight adjustments to the compensation capacitor may
be required to optimize settling response for any given application.
The settling time of the combination of the current output DAC
and the op amp can be approximated by
The actual overall settling time is affected by the noise gain of
the amplifier, the applied compensation, and the equivalent
input capacitance at the input of the amplifier.
DISCUSSION ON DRIVING ADCs
Settling characteristics of op amps also include the ability of the
amplifier to recover, that is, settle, from a transient current output
load condition. An example of this includes an op amp driving
the input from a SAR-type ADC. Although the comparison
point of the converter is usually diode clamped, the input swing
of plus-and-minus a diode drop still gives rise to a significant
modulation of input current. If the closed-loop output impedance
is low enough and bandwidth of the amplifier is sufficiently
large, the output settles before the converter makes a comparison
decision, which prevents linearity errors or missing codes.
Figure 50 shows a settling measurement circuit for evaluating
recovery from an output current transient. An output disturbing
current generator provides the transient change in output load
current of 1 mA.
t
S
TOTAL
100
0%
90
10
=
Figure 49. Effect of Altering Compensation from Circuit in Figure 47—PM7545 CMOS DAC with 1/2 OP249, Unipolar Operation;
(
500mV
t
S
DAC
RESPONSE IS GROSSLY UNDERDAMPED,
) (
2
+
AND EXHIBITS RINGING
t
S
AMP
C = 5pF
A
)
2
1µs
Critically Damped Response Is Obtained with C ≈ 33 pF
4µs
Rev. G | Page 16 of 20
100
0%
90
10
As seen in Figure 51, the OP249 has an extremely fast recovery
of 247 ns (to 0.01%) for a 1 mA load transient. The performance
makes it an ideal amplifier for data acquisition systems.
500mV
FAST RISE TIME CHARACTERISTICS, BUT AT EXPENSE
TTL INPUT
*DECOUPLE CLOSE TOGETHER ON GROUND
PLANE WITH SHORT LEAD LENGTHS.
100
0%
90
10
+15V
OF SLIGHT PEAKING IN RESPONSE
Figure 51. Transient Recovery Time of the OP249 from
2mV
Figure 50. Transient Output Impedance Test Fixture
1N4148
1.8kΩ
3
2
OP249
+15V
0.1µF
a 1 mA Load Transient to 0.01%
1/2
300pF
C = 15pF
+15V
–15V
1.5kΩ
8
4
B
2V
1µs
2N2907
220Ω
0.1µF
0.1µF
1
*
*
0.01µF
4µs
1kΩ
2N3904
V
1kΩ
10µF
0.47µF
REF
247.4ns
100ns
ΔI
OUT
7A13 PLUG-IN
7A13 PLUG-IN
=
|V
1kΩ
REF
|