AD8021AR Analog Devices Inc, AD8021AR Datasheet - Page 8

IC OPAMP VF LN LP LDIST 8SOIC

AD8021AR

Manufacturer Part Number
AD8021AR
Description
IC OPAMP VF LN LP LDIST 8SOIC
Manufacturer
Analog Devices Inc
Datasheet

Specifications of AD8021AR

Slew Rate
460 V/µs
Rohs Status
RoHS non-compliant
Design Resources
Driving the AD7366/7 Bipolar SAR ADC in Low-Distortion DC-Coupled Appls (CN0042)
Amplifier Type
Voltage Feedback
Number Of Circuits
1
-3db Bandwidth
560MHz
Current - Input Bias
7.5µA
Voltage - Input Offset
400µV
Current - Supply
7.8mA
Current - Output / Channel
70mA
Voltage - Supply, Single/dual (±)
4.5 V ~ 24 V, ±2.25 V ~ 12 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
8-SOIC (3.9mm Width)
No. Of Amplifiers
1
Bandwidth
560MHz
No. Of Pins
8
Operating Temperature Range
-40°C To +85°C
Peak Reflow Compatible (260 C)
No
Input Bias Current
7500nA
Output Type
-
Gain Bandwidth Product
-
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant

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AD8021
PIN CONFIGURATION AND FUNCTION DESCRIPTIONS
Table 5. Pin Function Descriptions
Pin No.
1
2
3
4
5
6
7
8
1
When Pin 8 ( DISABLE ) is higher than Pin 1 (LOGIC REFERENCE) by approximately 2 V or more, the part is enabled. When Pin 8 is brought down to within about 1.5 V of
Pin 1, the part is disabled. (See the Specifications tables for exact disable and enable voltage levels.) If the disable feature is not going to be used, Pin 8 can be tied to
+V
S
or a logic high source, and Pin 1 can be tied to ground or logic low. Alternatively, if Pin 1 and Pin 8 are not connected, the part is in an enabled state.
Mnemonic
LOGIC REFERENCE
−IN
+IN
−V
C
V
+V
DISABLE
OUT
COMP
S
S
Description
Reference for Pin 8
Inverting Input.
Noninverting Input.
Negative Supply Voltage.
Compensation Capacitor. Tie to −V
Output.
Positive Supply Voltage.
Disable, Active Low.
REFERENCE
LOGIC
–V
–IN
+IN
Figure 4. Pin Configuration
1
S
Voltage Level. Connect to logic low supply.
Rev. F | Page 8 of 28
1
2
3
4
AD8021
S
. (See the Applications section for value.)
8
7
6
5
DISABLE
+V
V
C
OUT
COMP
S

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