X40031S14Z-A Intersil, X40031S14Z-A Datasheet - Page 9

• Manufacturer Part Number: X40031S14Z-A
• Description: IC VOLTAGE MONITOR TRPL 14-SOIC
• Manufacturer: Intersil
• Type: Multi-Voltage Supervisorr

Specifications of X40031S14Z-A

• Number Of Voltages Monitored: 3
• Output: Open Drain or Open Collector
• Reset: Active Low
• Reset Timeout: Adjustable/Selectable
• Voltage - Threshold: 1.8V, 2.9V, 4.6V
• Operating Temperature: 0°C ~ 70°C
• Mounting Type: Surface Mount
• Package / Case: 14-SOIC (3.9mm Width), 14-SOL
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

The new V
be: V
Note: This operation does not corrupt the memory array.
Setting a Lower V
In order to set V
value, then V
procedure described in the following. Once V
“reset”, then V
the procedure described in “Setting a Higher VTRIPx
Voltage (x = 1, 2, 3)” on page 8.
Resetting the V
To reset a V
(Vp) to the WDO pin before a START condition is set up on
SDA. Next, issue on the SDA pin the Slave Address A0h
followed by the Byte Address 03h for V
and 0Fh for V
order to reset V
operation initiates the programming sequence. Pin WDO
must then be brought LOW to complete the operation.
After being reset, the value of V
value of 1.7V or lesser.
Note: This operation does not corrupt the memory array.
Set V
V
Control Register
The Control Register provides the user a mechanism for
changing the Block Lock and Watchdog Timer settings. The
Block Lock and Watchdog Timer bits are nonvolatile and do
not change when power is removed.
TRIP3
TRIPX
CC
V
ADJ.
TRIP1
respectively.
≅ 1.5(V2MON or V3MON), when setting V
TRIPX
(desired) – (V
TRIPx
TRIPx
TRIP3
TRIPx
TRIPx
TRIPx
voltage to be applied to VXMON will now
voltage, apply the programming voltage
TRIPx
must first be “reset” according to the
, followed by 00h for the Data Byte in
can be set to the desired voltage using
. The STOP bit following a valid write
TRIPx
to a lower voltage than the present
Voltage
TRIPX
V
ADJ.
TRIP2
Voltage (x=1, 2, 3)
V2FAIL
9
(actual) – V
TRIPx
becomes a nominal
TRIP1
X40030, X40031, X40034, X40035
RESET
TRIPX
, 0Bh for V
FIGURE 5. SAMPLE V
TRIPx
(desired)).
has been
TRIP2
TRIP2
or
,
1
6
2
7
X40030
TRIP
The Control Register is accessed with a special preamble in
the slave byte (1011) and is located at address 1FFh. It can
only be modified by performing a byte write operation directly
to the address of the register and only one data byte is
allowed for each register write operation. Prior to writing to the
Control Register, the WEL and RWEL bits must be set using a
two step process, with the whole sequence requiring 3 steps.
See “Writing to the Control Registers” on page 11.
The user must issue a stop, after sending this byte to the
register, to initiate the nonvolatile cycle that stores WD1,
WD0, PUP1, PUP0 and BP. The X40030, X40031, X40034,
X40035 will not acknowledge any data bytes written after the
first byte is entered.
The state of the Control Register can be read at any time by
performing a random read at address 1FFh, using the
special preamble. Only one byte is read by each register
read operation. The master should supply a stop condition to
be consistent with the bus protocol.
RWEL: Register Write Enable Latch (Volatile)
The RWEL bit must be set to “1” prior to a write to the
Control Register.
RESET CIRCUIT
PUP1
13
14
9
8
7
WD1
6
WD0
5
ADJUST
RUN
BP
4
V
P
3
0
RWEL
SCL
SDA
2
µC
WEL
1
August 25, 2008
FN8114.2
PUP0
0