X40030S14Z-A Intersil, X40030S14Z-A Datasheet - Page 6

• Manufacturer Part Number: X40030S14Z-A
• Description: IC VOLTAGE MONITOR TRPL 14-SOIC
• Manufacturer: Intersil
• Type: Multi-Voltage Supervisorr

Specifications of X40030S14Z-A

• Number Of Voltages Monitored: 3
• Output: Push-Pull, Totem Pole
• Reset: Active High
• Reset Timeout: Adjustable/Selectable
• Voltage - Threshold: 1.8V, 2.9V, 4.6V
• Operating Temperature: 0°C ~ 70°C
• Mounting Type: Surface Mount
• Package / Case: 14-SOIC (3.9mm Width), 14-SOL
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Pinouts
Pin Descriptions
PIN
10
12
13
14
11
1
2
3
4
5
6
7
8
9
LOWLINE
V2MON
RESET/
V3MON
V2FAIL
RESET
V3FAIL
LOWLINE
NAME
WDO
SDA
SCL
V
V
WP
NC
MR
V2MON
V2FAIL
RESET
SS
CC
V
MR
NC
SS
(14 LD SOIC, TSSOP)
V2 Voltage Fail Output. This open drain output goes LOW when V2MON is less than V
V2MON exceeds V
V2 Voltage Monitor Input. When the V2MON input is less than the V
monitor an unregulated power supply with an external resistor divider or can monitor a second power supply with no external
components. Connect V2MON to V
X40031) or by the V
Early Low V
No connect.
Manual Reset Input. Pulling the MR pin LOW initiates a system reset. The RESET/RESET pin will remain HIGH/LOW
until the pin is released and for the t
RESET Output. (X40030, X40034) This pin is an active HIGH CMOS output which goes HIGH whenever V
V
will also stay active until manual reset is released and for t
RESET Output. (X40031, X40035) This open drain pin is an active LOW output ,which goes LOW whenever V
below V
power-up. It will also stay active until manual reset is released and for t
Ground
Serial Data. SDA is a bidirectional pin used to transfer data into and out of the device. It has an open drain output and
may be wire ORed with other open drain or open collector outputs. This pin requires a pull-up resistor and the input buffer
is always active (not gated).
Watchdog Input. A HIGH to LOW transition on the SDA (while SCL is toggled from HIGH to LOW and followed by a stop
condition) restarts the Watchdog timer. The absence of this transition within the watchdog time out period results in WDO
going active.
Serial Clock. The Serial Clock controls the serial bus timing for data input and output.
Write Protect. WP HIGH prevents writes to any location in the device (including all the registers). It has an internal
pull-down resistor (>10MΩ typical).
V3 Voltage Monitor Input. When the V3MON input is less than the V
monitor an unregulated power supply with an external resistor divider or can monitor a third power supply with no external
components. Connect V3MON to V
V3 Voltage Fail Output. This open drain output goes LOW when V3MON is less than V
V3MON exceeds V
WDO Output. WDO is an active LOW, open drain output, which goes active whenever the watchdog timer goes active.
Supply Voltage.
X40030, X40034
1
2
3
4
5
6
7
TRIP1
TOP VIEW
voltage or if manual reset is asserted. This output stays active for the programmed time period (t
TRIP1
6
CC
voltage or if manual reset is asserted. This output stays active for the programmed time period (t
14
13
12
11
10
9
8
Detect. This CMOS output signal goes LOW when
TRIP2
TRIP3
CC
V
WDO
V3FAIL
V3MON
WP
SCL
SDA
X40030, X40031, X40034, X40035
CC
input (X40034, X40035).
. There is no power-up reset delay circuitry on this pin.
. There is no power-up reset delay circuitry on this pin.
SS
SS
PURST
or V
or
V
CC
thereafter.
CC when not used. The V3MON comparator is supplied by the V3MON input.
when not used. The V2MON comparator is supplied by V2MON (X40030,
FUNCTION
PURST
thereafter.
LOWLINE
V
TRIP2
V2FAIL
V2MON
RESET
CC < V
TRIP3
PURST
V
MR
NC
SS
voltage, V2FAIL goes LOW. This input can
(14 LD SOIC, TSSOP)
voltage, V3FAIL goes LOW. This input can
TRIP1
thereafter.
X40031, X40035
1
2
3
4
5
6
7
TOP VIEW
and goes high when
TRIP2
TRIP3
14
13
12
11
10
and goes HIGH when
and goes HIGH when
9
8
PURST
V
WDO
V3FAIL
V3MON
WP
SCL
SDA
CC
CC
V
) on power-up. It
CC > V
falls below
August 25, 2008
PURST
CC
TRIP1
FN8114.2
falls
) on
.