DVIULC6-2M6 STMicroelectronics, DVIULC6-2M6 Datasheet
DVIULC6-2M6
Specifications of DVIULC6-2M6
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DVIULC6-2M6 Summary of contents
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... MIL STD883G-Method 3015-7 May 2008 Ultra low capacitance ESD protection µQFN (pin view) DVIULC6-2M6 Applications ■ DVI ports up to 1.65 Gb/s ■ IEEE 1394a, b, and 3.2 Gb/s ■ USB2.0 ports up to 480 Mb/s (high speed), backwards compatible with USB1 ...
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... Parameter Test Conditions BUS Any I/O pin to GND Any I/O pin to GND 825 MHz MHz 825 MHz R DVIULC6-2x6 6 I/ BUS 4 I/O2 SOT666 Value ±15 ±15 ±25 -55 to +150 125 260 Value Min. Typ. Max 0 8/20 µ 8/20 µ 0.85 ...
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... I/O – I/O - 12.00 1000 10000 - 16.00 300.0k Figure =5.3GHz 300.0M 1.0G 3.0G Characteristics Line capacitance versus frequency (typical values) DVIULC6-2M6 V =30mV osc T =25° I-O/GND V BUS C I/O - GND C I I/O F(MHz) 10 100 1000 Frequency response (typical values) DVIULC6-2M6 S21(db) Fc=5.9GHz F(Hz) 1 ...
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... Figure 10. Eye diagram at 1.65 Gbps amplitude 500 mV PCB + DVIULC6-2P6 Horizontal: 100 ps/div Vertical: 200 mV/div 4/17 Figure 9. Eye diagram at 3.2 Gbps amplitude 500 mV PCB + DVIULC6-2M6 Horizontal: 50 ps/div Vertical: 200 mV/div Figure 11. Eye diagram at 3.2 Gbps amplitude 500 mV PCB + DVIULC6-2P6 Horizontal: 50 ps/div Vertical: 200 mV/div DVIULC6-2x6 ...
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... Notebook) Multimedia controller CEC SCL Vcc 5V SDA HPD Figure 13. T1/E1/Ethernet protection DVI Tx0 Tx0 TMDS transmitter DVI connectors Tx1 video 2 5 Tx1 audio DVIULC6-2M6 Ctrl / Tx2 status 2 5 Tx2 TC TC TMDS links DVIULC6-4SC6 Control links + 100nF SMP75 100nF SMP75-8 Application examples ...
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... Figure 14. PCB layout example PCB Characteristics Substrate 730 m, Er =3.9 Tracks µm copper Coatinbg µm above substrate µm above tracks 3.4 GND plane on the bottom layer Figure 15. TDR results for DVIULC6-2M6 with PCB layout example 6/17 Width=100 µm Space=400 µm 3160 Width=215 µm Space=100 µ ...
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... DVIULC6-2x6 3 Technical information 3.1 Surge protection The DVIULC6-2x6 is particularly optimized to perform ESD surge protection based on the rail to rail topology. The clamping voltage with forward drop voltage and TRANSIL Calculation example We assume that the value of the dynamic resistance of the clamping diode is typically ...
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... SURGE SURGE SURGE SURGE TRANSIL TRANSIL F F tr=1ns tr=1ns tr=1ns tr=1ns tr=1ns tr=1ns - NEGATIVE NEGATIVE - - - - - - - - I/O I/O I/O I/O GND GND GND GND SURGE SURGE CL- CL- TEST BOARD TEST BOARD IN IN OUT OUT DVIULC6-2M6 during negative ESD surge 10V/Div DVIULC6-2x6 100ns/Div ...
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... The perturbed line will be more affected if it works with low voltage signal or high load impedance (few k ). Figure 21. Remaining voltage after the 10V/Div 100ns/Div R G1 Line Line DRIVERS This part of the Technical information DVIULC6-26 during negative ESD surge + RECEIVERS fact the real voltage at this point 2 ...
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... In usual frequency range of analog signals (up to 240 MHz) the effect on disturbed line is less than -40 dB (see Figure 24, and Figure Figure 24. Analog crosstalk results (typical values) for DVIULC6-2M6 Figure 25. Analog crosstalk results (typical values) for DVIULC6-2P6 10/17 TEST BOARD TEST BOARD ...
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... DVIULC6-2x6 4 Recommendation on PCB assembly 4.1 Stencil opening design 1. General recommendation on stencil opening design a) Stencil opening dimensions: L (Length), W (Width), T (Thickness) Figure 26. Stencil opening dimensions. b) General Design Rule Stencil thickness ( 125 µm Aspect Ratio Aspect Area 2. Reference design a) Stencil opening thickness: 100 µm b) Stencil opening for leads: Opening to footprint ratio is 90% ...
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... To control the solder paste amount, the closed via is recommended instead of open vias. 2. The position of tracks and open vias in the solder area should be well balanced. The symmetrical layout is recommended, in case any tilt phenomena caused by asymmetrical solder paste amount due to the solder flow away. 12/17 DVIULC6-2x6 ...
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... DVIULC6-2x6 4.5 Reflow profile Figure 28. ST ECOPACK® recommended soldering reflow profile for PCB mounting Temperature (°C) Temperature (°C) 260°C max 260°C max 255°C 255°C 220°C 220°C 180°C 180°C 125 °C 125 °C ...
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... 0.50 0.25 [0.020] [0.010] 0.65 [0.026] 0.30 [0.012] DVIULC6-2x6 Dimensions Millimeters Inches Min. Typ. Max. Min. Typ. 0.50 0.55 0.60 0.020 0.022 0.024 0.00 0.02 0.05 0.000 0.001 0.002 0.18 0.25 0.30 0.007 0.010 0.012 1.45 0.057 1.00 0.039 0.50 0.020 ...
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... DVIULC6-2x6 Table 4. SOT-666 dimensions Figure 30. Footprint (dimensions in mm) Ref 0.50 0.99 0.30 Package information Dimensions Millimeters Inches Min. Typ. Max. Min. Typ. 0.45 0.60 0.018 0.08 0.18 0.003 0.17 0.34 0.007 0.19 0.27 0.34 0.007 0.011 0.013 1.50 1.70 0.059 1.50 1 ...
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... Ordering information 6 Ordering information Table 5. Ordering information Order code DVIULC6-2M6 DVIULC6-2P6 1. The marking can be rotated by 90° to diferentiate assembly location 7 Revision history Table 6. Document revision history Date 06-May-2008 16/17 Marking Package Weight (1) T µQFN 6 leads 2 SOT-666 2.9 mg Revision 1 First issue. DVIULC6-2x6 ...
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... DVIULC6-2x6 Information in this document is provided solely in connection with ST products. STMicroelectronics NV and its subsidiaries (“ST”) reserve the right to make changes, corrections, modifications or improvements, to this document, and the products and services described herein at any time, without notice. All ST products are sold pursuant to ST’s terms and conditions of sale. ...